參數(shù)資料
型號: MB90P634APF
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 16-bit Proprietary Microcontroller
中文描述: 16-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, QFP-100
文件頁數(shù): 58/107頁
文件大?。?/td> 1589K
代理商: MB90P634APF
58
MB90630A Series
11. Watchdog Timer
The watchdog timer consists of a 2-bit watchdog counter that uses the carry signal from the 18-bit timebase
counter as its clock source, a control register, and a watchdog reset controller. The following block diagram
shows the structure of both the watchdog timer and timebase timer (see “12. Timebase Timer”).
(1) Block Diagram
(2) Register Configuration
WTE
WT1
WT0
Selector
2-bit counter
Reset
control
Selectror
Clear
TBIE
TBOF
I
2
OS
IRQ
TBR
TBC1
TBC0
Clear
control
2
Power-on reset
STOP mode
f/2
1
2
1
12
2
1
13
2
1
14
2
1
15
2
1
16
2
1
17
2
1
18
.........
Timebase counter
Reset
Output enable
Clear
OSC1
OSC0
Selectror
Oscillation stabilization delay completion signal
1/2
16
to
1/2
18
(Timebase division output)
7
6
5
4
3
2
1
0
0000A8
H
bit
PONR
STBR
WRST
ERST
SRST
WTE
WT1
WT0
Address:
Watchdog timer control register
(WDTC)
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