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參數資料
| 型號： | MB90P214APF |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | PLASTIC, QFP-80 |
| 文件頁數： | 5/100頁 |
| 文件大?。?/td> | 1753K |
| 代理商： | MB90P214APF |
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MB90210 Series
12
* : FPT-80P-M06, FPT-80C-C02
(Continued)
Pin no.
Pin name
Circuit
type
Function
QFP*
58
INT3
D
External interrupt request input pin
Since this input is used whenever external interrupts are enabled,
the output by any other function must be suspended unless the
output is intentionally performed.
When these pins are open in input mode, through current may
leak in stop mode/reset mode, be sure to fix these pins to VCC/VSS
level to use these pins in input mode.
59
P55
E
General-purpose I/O port
This port is available in the single-chip mode or when the WRL
pin output is disabled.
WRL
Write strobe output pin for the lower eight bits of data bus
This pin is available in an external-bus mode and when the WRL
pin output is enabled.
60
P56
E
General-purpose I/O port
This port is available in the single-chip mode.
RD
Data bus read strobe output pin
This pin is available in an external-bus mode.
61
P57
D
General-purpose I/O port
This port is always available.
When these pins are open in input mode, through current may
leak in stop mode/reset mode, be sure to fix these pins to VCC/VSS
level to use these pins in input mode.
WI
RAM write disable request input
Since this input is used during this operation at any time, the
output by any other function must be suspended unless the
output is intentionally performed.
When these pins are open in input mode, through current may
leak in stop mode/reset mode, be sure to fix these pins to VCC/VSS
level to use these pins in input mode.
32,
33,
35 to 40
P60,
P61,
P62 to P67
C
Open-drain I/O ports
These ports are available when the analog input enable register
setting is “port.”
AN0,
AN1,
AN2 to AN7
10-bit A/D converter analog input pins
These pins are available when the analog input enable register
setting is “analog input.”
41 to 43
MD0 to MD2
F
Operation mode select signal input pins
Connect these pins directly to VCC or VSS.
44
HST
G
Hardware standby input pin
45
P70
E
General-purpose I/O port
This port is available when the UART (ch.1) clock output is
disabled.
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