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參數(shù)資料
| 型號： | MB90F983 |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-64 |
| 文件頁數(shù)： | 21/48頁 |
| 文件大?。?/td> | 321K |
| 代理商： | MB90F983 |
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MB90980 Series
21
(Continued)
Address
Abbreviated
register name
Register name
R/W
Resource name
Initial value
0000A0
H
LPMCR
Low-power consumption mode control
register
W, R/W
Low-power
operation
Low-power
operation
0 0 0 1 1 0 0 0
B
0000A1
H
CKSCR
Clock select register
R, R/W
1 1 1 1 1 1 0 0
B
0000A2
H
to
0000A7
H
0000A8
H
0000A9
H
0000AA
H
0000AB
H
0000AC
H
0000AD
H
0000AE
H
0000AF
H
0000B0
H
0000B1
H
0000B2
H
0000B3
H
0000B4
H
0000B5
H
0000B6
H
0000B7
H
0000B8
H
0000B9
H
0000BA
H
0000BB
H
0000BC
H
0000BD
H
0000BE
H
0000BF
H
0000C0
H
to
0000C9
H
0000CA
H
0000CB
H
0000CC
H
0000CD
H
0000CE
H
Reserved area
WDTC
TBTC
WTC
Watchdog timer control register
Timebase timer control register
Watch timer control register
R, W
W, R/W
R, R/W
Watchdog timer
Timebase timer
Watch timer
XXXXX 1 1 1
B
1 X X 0 0 1 0 0
B
1 0 0 0 1 0 0 0
B
Reserved area
DERL
DERH
FMCS
μ
DMAC enable register
μ
DMAC enable register
Flash memory control status register
R/W
R/W
W, R/W
μ
DMAC
μ
DMAC
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
Flash memory I/F 0 0 0 X 0 0 0 0
B
Disabled
ICR00
ICR01
ICR02
ICR03
ICR04
ICR05
ICR06
ICR07
ICR08
ICR09
ICR10
ICR11
ICR12
ICR13
ICR14
ICR15
Interrupt control register 00
Interrupt control register 01
Interrupt control register 02
Interrupt control register 03
Interrupt control register 04
Interrupt control register 05
Interrupt control register 06
interrupt control register 07
Interrupt control register 08
Interrupt control register 09
Interrupt control register 10
Interrupt control register 11
Interrupt control register 12
Interrupt control register 13
Interrupt control register 14
Interrupt control register 15
W, R/W
W, R/W
W, R/W
W, R/W
W, R/W
W, R/W
W, R/W
W, R/W
W, R/W
W, R/W
W, R/W
W, R/W
W, R/W
W, R/W
W, R/W
W, R/W
Interrupt controller
0 0 0 0 0 1 1 1
B
0 0 0 0 0 1 1 1
B
0 0 0 0 0 1 1 1
B
0 0 0 0 0 1 1 1
B
0 0 0 0 0 1 1 1
B
0 0 0 0 0 1 1 1
B
0 0 0 0 0 1 1 1
B
0 0 0 0 0 1 1 1
B
0 0 0 0 0 1 1 1
B
0 0 0 0 0 1 1 1
B
0 0 0 0 0 1 1 1
B
0 0 0 0 0 1 1 1
B
0 0 0 0 0 1 1 1
B
0 0 0 0 0 1 1 1
B
0 0 0 0 0 1 1 1
B
0 0 0 0 0 1 1 1
B
Reserved area
TMCSR
Timer control status register
R/W
16-bit reload timer
0 0 0 0 0 0 0 0
B
- - - - 0 0 0 0
B
TMR/TMRLR
16-bit timer register/
16-bit reload register
R/W
XXXXXXXX
B
Reserved area
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