
MB90945 Series
4
DS07-13741-3E
(Continued)
Part Number
Parameter
MB90947A
MB90F946A
MB90F947A, MB90F949A
MB90V390HB
A/D Converter
(15 input channels)
10-bit or 8-bit resolution
Conversion time : Min 4.9
s includes sample time (per one channel, only at certain
machine clock frequencies)
16-bit Reload Timer
1 channel
2 channels
Operation clock frequency : fsys/21, fsys/23, fsys/25 (fsys
= System clock frequency)
Supports External Event Count function
16-bit
Free-Run Timer
(2 channels)
Signals an interrupt when overflowing
Supports Timer Clear when a match with Output Compare (ch0)
Operation clock freq. : fsys, fsys/21, fsys/22, fsys/23, fsys/24, fsys/25, fsys/26, fsys/27
(fsys
= System clock freq.)
16-bit Free-Run Timer 0 (clock input FRCK0) corresponds to ICU 0/1, OCU 0/1/2/3
16-bit Free-Run Timer 1 (clock input FRCK1) corresponds to ICU 2/3/4/5
16-bit
Input Capture
(6 channels)
Rising edge, falling edge or rising & falling edge sensitive
Six 16-bit Capture registers
Signals an interrupt upon external event
ICU 3/5 inputs are
shared with OCU 6/7
outputs
16-bit
Output Compare
4 channels
8 channels
Signals an interrupt when a match with 16-bit Free-Run Timer
Eight 16-bit compare registers.
A pair of compare registers can be used to generate an output signal.
ICU 3/5 inputs are
shared with OCU 6/7
outputs
8/16-bit
Programmable
Pulse Generator
(6 channels)
Supports 8-bit and 16-bit operation modes
Twelve 8-bit reload counters
Twelve 8-bit reload registers for L pulse width
Twelve 8-bit reload registers for H pulse width
A pair of 8-bit reload counters can be configured as one 16-bit reload counter or as
8-bit prescaler plus 8-bit reload counter
Operation clock freq. : fsys, fsys/21, fsys/22, fsys/23, fsys/24 or 102.4
s (fosc = 5 MHz)
(fsys
= System clock frequency, fosc = Oscillation clock frequency)
CAN Interface
1 channel
5 channels
Conforms to CAN Specification Version 2.0 Part A and B
Automatic re-transmission in case of error
Automatic transmission responding to Remote Frame
Prioritized 16 message buffers for data and ID’s
Supports multiple messages
Flexible configuration of acceptance filtering :
Full-bit compare/Full-bit mask/Two partial bit masks
Supports up to 1 Mbps