參數(shù)資料
型號(hào)： MB90F867ASPFV
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 16-bit Proprietary Microcontroller CMOS
中文描述： 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP100
封裝： PLASTIC, LQFP-100
文件頁(yè)數(shù)： 8/62頁(yè)
文件大小： 412K
代理商： MB90F867ASPFV
MB90860A Series
8
I
PIN DESCRIPTION
(Continued)
Pin No.
Pin name
Circuit
type
Function
LQFP100*
2
QFP100*
1
90
91
52
92
93
54
X1
X0
RST
A
Oscillation output
Oscillation input
Reset input
General purpose I/O. The register can be set to select whether
to use a pull-up resistor. This function is enabled in single-chip
mode.
I/O pins for 8 lower bits of the external address/data bus.
This function is enabled when the external bus is enabled.
External interrupt request input pins for INT8 to INT15.
General purpose I/O. The register can be set to select whether
to use a pull-up resistor. This function is enabled in single-chip
mode.
I/O pin for bit 8 of the external address/data bus.
This function is enabled when the external bus is enabled.
Event input pin for the reload timer 1
General purpose I/O. The register can be set to select whether
to use a pull-up resistor. This function is enabled in single-chip
mode.
I/O pin for bit 9 of the external address/data bus.
This function is enabled when the external bus is enabled.
Output pin for the reload timer 1
General purpose I/O. The register can be set to select whether
to use a pull-up resistor. This function is enabled in single-chip
mode.
I/O pin for bit 10 of the external address/data bus.
This function is enabled when the external bus is enabled.
Serial data input pin for UART3
Sub external interrupt request input pin for INT11
General purpose I/O. The register can be set to select whether
to use a pull-up resistor. This function is enabled in single-chip
mode.
I/O pin for bit 11 of the external address/data bus.
This function is enabled when the external bus is enabled.
Serial data output pin for UART3
General purpose I/O. The register can be set to select whether
to use a pull-up resistor. This function is enabled in single-chip
mode.
I/O pin for bit 12 of the external address/data bus.
This function is enabled when the external bus is enabled.
Clock I/O pin for UART3
E
75 to 82
77 to 84
P00 to P07
G
AD00 to AD07
INT8 to INT15
83
85
P10
G
AD08
TIN1
84
86
P11
G
AD09
TOT1
85
87
P12
N
AD10
SIN3
INT11R
86
88
P13
G
AD11
SOT3
87
89
P14
G
AD12
SCK3
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