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參數(shù)資料
| 型號： | MB90F867APFV |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-bit general-purpose microcontroller |
| 中文描述： | 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 9/62頁 |
| 文件大?。?/td> | 412K |
| 代理商： | MB90F867APFV |
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MB90860A Series
9
(Continued)
Pin No.
Pin name
Circuit
type
Function
LQFP100*
2
QFP100*
1
92
94
P15
G
General purpose I/O. The register can be set to select whether
to use a pull-up resistor. This function is enabled in single-chip
mode.
I/O pin for bit 13 of the external address/data bus.
This function is enabled when the external bus is enabled.
Serial data input pin for UART4 (MB90V340 only)
General purpose I/O. The register can be set to select whether
to use a pull-up resistor. This function is enabled in single-chip
mode.
I/O pin for bit 14 of the external address/data bus.
This function is enabled when the external bus is enabled.
Serial data output pin for UART4 (MB90V340 only)
General purpose I/O. The register can be set to select whether
to use a pull-up resistor. This function is enabled in single-chip
mode.
I/O pin for bit 15 of the external address/data bus. This function
is enabled when the external bus is enabled.
Clock I/O pin for UART4 (MB90V340 only)
General purpose I/O. The register can be set to select whether
to use a pull-up resistor.In external bus mode, the pin is
enabled as a general-purpose I/O port when the corresponding
bit in the external address output control register (HACR) is 1.
Output pins for A16 to A19 of the external address bus. When
the corresponding bit in the external address output control
register (HACR) is 0, the pins are enabled as high address
output pins (A16 to A19).
AD13
SIN4
93
95
P16
G
AD14
SOT4
94
96
P17
G
AD15
SCK4
95 to 98
97 to 100
P20 to P23
G
A16 to A19
PPG9,PPGB,
PPGD,PPGF
Output pins for PPGs
99 to 2
1 to 4
P24 to P27
G
General purpose I/O. The register can be set to select whether
to use a pull-up resistor.In external bus mode, the pin is
enabled as a general-purpose I/O port when the corresponding
bit in the external address output control register (HACR) is 1.
Output pins for A20 to A23 of the external address bus. When
the corresponding bit in the external address output control
register (HACR) is 0, the pins are enabled as high address
output pins (A20 to A23).
Data sample input pins for input captures ICU0 to ICU3
General purpose I/O.The register can be set to select whether
to use a pull-up resistor.This function is enabled in single-chip
mode.
Address latch enable output pin. This function is enabled when
the external bus is enabled.
Data sample input pin for input capture ICU4
A20 to A23
IN0 to IN3
3
5
P30
G
ALE
IN4
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