參數(shù)資料
型號(hào)： MB90F583BPF
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 16-bit Proprietary Microcontroller
中文描述： 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100
封裝： PLASTIC, QFP-100
文件頁數(shù)： 114/124頁
文件大?。?/td> 2638K
代理商： MB90F583BPF
MB90580B Series
114
Table 15 Logical 2 Instructions (Long Word) [6 Instructions]
Note : For an explanation of “(a)” to “(d)”, refer to Table 4, “Number of Execution Cycles for Each Type of Addressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
Table 16 Sign Inversion Instructions (Byte/Word) [6 Instructions]
Note : For an explanation of “(a)” to “(d)”, refer to Table 4, “Number of Execution Cycles for Each Type of Addressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
Table 17 Normalize Instruction (Long Word) [1 Instruction]
*1: 4 when the contents of the accumulator are all zeroes, 6 + (R0) in all other cases (shift count).
Note : For an explanation of “(a)” to “(d)”, refer to Table 4, “Number of Execution Cycles for Each Type of Addressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
Mnemonic
#
~
RG
B
Operation
LH
AH
I
S
T
N
Z
V
C
RMW
ANDL
ANDL
A, ear
A, eam
ORL
ORL
A, ear
A, eam
XORL
XORL
A, ea
A, eam
2
2+
2
2+
2
2+
6
7+ (a)
6
7+ (a)
6
7+ (a)
2
0
2
0
2
0
0
(d)
0
(d)
0
(d)
long (A)
←
(A) and (ear)
long (A)
←
(A) and (eam)
long (A)
←
(A) or (ear)
long (A)
←
(A) or (eam)
long (A)
←
(A) xor (ear)
long (A)
←
(A) xor (eam)
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
*
*
*
*
*
*
*
*
*
*
*
*
R
R
R
R
R
R
–
–
–
–
–
–
–
–
–
–
–
–
Mnemonic
#
~
RG
B
Operation
LH
AH
I
S
T
N
Z
V
C
RMW
NEG
A
NEG
NEG
ear
eam
1
2
2+
2
3
5+ (a)
0
2
0
0
0
2
×
(b)
0
byte (A)
←
0 – (A)
byte (ear)
←
0 – (ear)
byte (eam)
←
0 – (eam)
word (A)
←
0 – (A)
X
–
–
–
–
–
–
–
–
–
–
–
–
–
–
*
*
*
*
*
*
*
*
*
*
*
*
–
–
*
NEGW A
NEGW ear
NEGW eam
1
2
2+
2
3
5+ (a)
0
2
0
0
2
×
(c)
word (ear)
←
0 – (ear)
word (eam)
←
0 – (eam)
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
*
*
*
*
*
*
*
*
*
*
*
*
–
–
*
Mnemonic
#
~
RG
B
Operation
LH
AH
I
S
T
N
Z
V
C
RMW
NRML A, R0
2
*
1
1
0
long (A)
←
Shift until first digit is “1”
byte (R0)
←
Current shift count
–
–
–
–
–
–
*
–
–
–
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