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參數(shù)資料
| 型號(hào)： | MB90F574APFF |
| 廠商： | FUJITSU LTD |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP120 |
| 封裝： | PLASTIC, LQFP-120 |
| 文件頁(yè)數(shù)： | 10/135頁(yè) |
| 文件大小： | 2504K |
| 代理商： | MB90F574APFF |
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10
MB90570 Series
Pin no.
LQFP-120 *
1
QFP-120 *
2
18
Pin name
Circuit type
Function
P51
SOT2
E
In single chip mode this is a general-purpose I/O port.
This is also the I/O serial ch.0 data output pin. This function is valid when
serial ch.0 is enabled for serial data output.
In single chip mode this is a general-purpose I/O port.
19
P52
SCK2
E
This is also the I/O serial ch.0 clock I/O pin. This function is valid when
serial ch.0 is enabled for serial data output.
In single chip mode this is a general-purpose I/O port.
20
P53
SIN3
E
This is also the I/O serial ch.1 data input pin. During serial data input, this
input signal is in continuous use, and therefore the output function should
only be used when needed.
In single chip mode this is a general-purpose I/O port.
21
P54
SOT3
E
This is also the I/O serial ch.1 data output pin. This function is valid when
serial ch.1 is enabled for serial data output.
In single chip mode this is a general-purpose I/O port.
22
P55
SCK3
E
This is also the I/O serial ch.1 clock I/O pin. This function is valid when
serial ch.1 is enabled for serial data output.
In single chip mode this is a general-purpose I/O port.
23,24
P56,P57
IN0,IN1
E
These are also the input capture ch.0/1 trigger input pins. During input
capture signal input on ch.0/1 this function is in continuous use, and
therefore the output function should only be used when needed.
In single chip mode this is a general-purpose I/O port. When set for input
it can be set by the pull-up resistance register (RDR6). When set for
output this setting will be invalid.
This is also the I/O serial ch.2 data input pin. During serial data input this
function is in continuous use, and therefore the output function should
only be used when needed.
In single chip mode this is a general-purpose I/O port. When set for input
it can be set by the pull-up resistance register (RDR6). When set for
output this setting will be invalid.
This is also the I/O serial ch.2 data output pin. This function is valid when
serial ch.2 is enabled for serial data output.
In single chip mode this is a general-purpose I/O port. When set for input
it can be set by the pull-up resistance register (RDR6). When set for
output this setting will be invalid.
This is also the I/O serial ch.2 serial clock I/O pin. This function is valid
when serial ch.2 is enabled for serial data output.
In single chip mode this is a general-purpose I/O port. When set for input
it can be set by the pull-up resistance register (RDR6). When set for
output this setting will be invalid.
This is also the clock monitor output pin. This function is valid when clock
monitor output is enabled.
25
P60
F
SIN4
26
P61
F
SOT4
27
P62
F
SCK4
28
P63
F
CKOT
*1: FPT-120P-M05
*2: FPT-120P-M13
,
FPT-120P-M21
(Continued)
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