![](http://datasheet.mmic.net.cn/330000/MB90F549_datasheet_16437915/MB90F549_4.png)
MB90540/545 Series
4
I
PRODUCT LINEUP
The following table provides a quick outlook of the MB90540/545 Series
Features
MB90F543
(Continued)
MB90F549
MB90V540
Classification
Flash ROM product
Evaluation product
ROM size
128 Kbytes
Boot Block
256 Kbytes
Boot Block
None
ROM size
6 K
8 K
CPU functions
The number of instructions: 351
Instruction bit length: 8 bits, 16 bits
Instruction length: 1 byte to 7 bytes
Data bit length: 1bit, 8 bits, 16 bits
Minimum execution time: 62.5 ns (at machine clock frequency of 16 MHz)
Interrupt processing time: 1.5
μ
s (at machine clock frequency of 16 MHz, minimum value)
Clock synchronized transmission (500 K / 1M / 2 Mbps)
Clock asynchronized transmission (4808 / 5208 / 9615 / 10417 / 19230 / 38460 / 62500
/500000 bps at machine clock frequency of 16 MHz)
Transmission can be performed by bi-directional serial transmission or by master/slave
connection.
UART 0
UART 1 (SCI)
Clock synchronized transmission (62.5 K/ 12 K/ 250 K/ 500 K/ 1 Mbps)
Clock asynchronized transmission (1202/ 2404/ 4808/ 9615/ 31250 bps)
Transmission can be performed by bi-directional serial
Transmission or by master / slave connection.
8/10-bit A/D converter
Conversion precision: 8/10-bit can be selectively used.
Number of inputs: 8
One-shot conversion mode (converts selected channel once only)
Scan conversion mode (converts two or mode successive channels and can program up
to 8 channels)
Continuous conversion mode (converts selected channel continuously)
Stop conversion mode (converts selected channel and stop operation repeatedly)
Number of channels: 8/16 bit
×
4 channels
PPG operation of 8-bit or 16 bit
A pulse wave of given intervals and given duty ratios can be output.
Pulse interval: fsys, fsys/2
1
, fsys/2
2
, fsys/2
3
, fsys/2
4
, 128
μ
s
(at oscillation of 4 MHz, fsys = machine clock frequency of 16 MHz, fosc = oscillation clock
frequency)
8/16-bit PPG timers
16-bit Reload timer
Number of channels:2
Operation clock frequency: fsys/2
1
, fsys/2
3
, fsys/2
5
(fsys = System clock frequency)
Supports External Event Count function
16-bit
I/O
timer
16-bit
Output com-
pares
Number of channels: 4
Pin input factor: A match signal of compare register
Input cap-
tures
Number of channels: 8
Rewriting a register value upon a pin input (rising, falling, or both edges)