參數(shù)資料
型號(hào)： MB90F523BPFF
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： Octal Edge-Triggered D-type Flip-Flops With 3-State Outputs 20-LCCC -55 to 125
中文描述： 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP120
封裝： PLASTIC, LQFP-120
文件頁(yè)數(shù)： 21/99頁(yè)
文件大?。?/td> 978K
代理商： MB90F523BPFF
MB90520A/520B Series
21
I
MEMORY MAP
Note : The upper part of 00 bank contains a mirror of the ROM data in FF bank. This is called the mirror ROM
function and enables use of the C compiler’s small memory model. As the lower 16 bits of the FF bank and
00 bank addresses are the same, tables located in ROM can be referenced without needing to declare far
pointers.
For example, accessing 00C000
H
actually accesses the contents of ROM at FFC000
H
. Note that, as the FF
bank ROM area exceeds 48 KBytes, the entire ROM image cannot be mirrored in 00 bank. Accordingly, as
ROM data from FF4000
H
to FFFFFF
H
is mirrored in 004000
H
to 00FFFF
H
, always locate ROM data tables in
the range FF4000
H
to FFFFFF
H
.
FFFFFF
H
Address #1
Address #2
Address #3
FE0000
H
010000
H
004000
H
002000
H
000100
H
0000C0
H
000000
H
Single chip mode with mirror function
ROM area
ROM area
(image of
FF bank)
RAM
Peripherals
Registers
: Internal memory access
: Access prohibited
* : The values of addresses #1, #2, and #3 vary by product.
Part No.
Address #1
*
Address #2
*
Address #3
*
MB90522A/B
FF0000
H
004000
H
001100
H
MB90523A/B
FE0000
H
004000
H
001100
H
MB90F523B
FE0000
H
004000
H
001100
H
MB90V520A
001900
H
相關(guān)PDF資料
PDF描述
MB90F523BPFV Octal Edge-Triggered D-type Flip-Flops With 3-State Outputs 20-CDIP -55 to 125
MB90V520 16-bit Proprietary Microcontroller
MB90522 36-Bit Bus Transceivers With 3-State Outputs 100-LQFP -55 to 125
MB90522PFF Quadruple 2-Input Positive-NAND Gates 14-CDIP -55 to 125
MB90522PFV Quadruple 2-Input Positive-NAND Gates 14-CFP -55 to 125
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