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MB90480/485 Series
20
I
I/O MAP
(Continued)
Address
Register name
Abbreviated
register name
PDR0
PDR1
PDR2
PDR3
PDR4
PDR5
PDR6
Read/
Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Resource name
Initial value
00
H
01
H
02
H
03
H
04
H
05
H
06
H
Port 0 data register
Port 1 data register
Port 2 data register
Port 3 data register
Port 4 data register
Port 5 data register
Port 6 data register
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
XXXXXXXX
B
XXXXXXXX
B
XXXXXXXX
B
XXXXXXXX
B
XXXXXXXX
B
XXXXXXXX
B
XXXXXXXX
B
XXXXXXXX
B
(MB90480 series)
11XXXXXX
B
(MB90485 series)
XXXXXXXX
B
XXXXXXXX
B
- - - - XXXX
B
07
H
Port 7 data register
PDR7
R/W
Port 7
08
H
09
H
0A
H
Port 8 data register
Port 9 data register
Port A data register
PDR8
PDR9
PDRA
R/W
R/W
R/W
Port 8
Port 9
Port A
0B
H
Up/down timer input enable register
UDRE
R/W
U/D timer input
control
XX 0 0 0 0 0 0
B
0C
H
0D
H
0E
H
0F
H
10
H
11
H
12
H
13
H
14
H
15
H
16
H
Interrupt/DTP enable register
Interrupt/DTP source register
Request level setting register
Request level setting register
Port 0 direction register
Port 1 direction register
Port 2 direction register
Port 3 direction register
Port 4 direction register
Port 5 direction register
Port 6 direction register
ENIR
EIRR
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DTP/external
interrupts
0 0 0 0 0 0 0 0
B
XXXXXXXX
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
(MB90480 series)
XX0 0 0 0 0 0
B
(MB90485 series)
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
- - - - 0 0 0 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
(MB90480 series)
XX0 0 0 0 0 0
B
(MB90485 series)
1 1 1 1 1 1 1 1
B
ELVR
DDR0
DDR1
DDR2
DDR3
DDR4
DDR5
DDR6
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
17
H
Port 7 direction register
DDR7
R/W
Port 7
18
H
19
H
1A
H
1B
H
1C
H
1D
H
Port 8 direction register
Port 9 direction register
Port A direction register
Port 4 output pin register
Port 0 input resistance register
Port 1 input resistance register
DDR8
DDR9
DDRA
ODR4
RDR0
RDR1
R/W
R/W
R/W
R/W
R/W
R/W
Port 8
Port 9
Port A
Port 4 (OD control)
Port 0 (Pull-up)
Port 1 (Pull-up)
1E
H
Port 7 output pin register
ODR7
R/W
Port 7 (OD control)
1F
H
Analog input enable register
ADER
R/W
Port 5, A/D