
MB90435 Series
4
I
 PRODUCT LINEUP
(Continued)
Features
MB90F438L (S) /F439 (S) 
MB90437L (S) *
1
/438L (S) /439 (S) 
F
2
MC-16LX CPU
MB90V540G
CPU
System clock
On-chip PLL clock multiplier (
×
1, 
×
2, 
×
3, 
×
4, 1/2 when PLL stop) 
Minimum instruction exection time : 62.5 ns (4 MHz osc. PLL 
×
 4) 
Mask ROM : 
 MB90437L(S): 64 Kbytes
 MB90438L(S): 128 Kbytes
 MB90439(S): 256 Kbytes
 MB90437L(S): 2 Kbytes
 MB90438L(S): 4 Kbytes
 MB90439(S): 6 Kbytes
MB90F438L/F439
 : Two clocks system
MB90F438LS/F439S
 : One clock system
 : One clock system
ROM
Flash memory
MB90F438L(S) : 128 Kbytes
MB90F439(S)  : 256 Kbytes
External
RAM
MB90F438L(S)  : 4 Kbytes
MB90F439(S)  : 6 Kbytes
8 Kbytes
Clocks
MB90437L/438L/439
 : Two clocks system
MB90437LS/438LS/439S
Two clocks system*
2
Operating voltage 
range
Temperature range
Package
Emulator-specify
power supply
*3
*5
40 
°
C to 105 
°
C
QFP100, LQFP100
PGA-256
None
UART0
Full duplex double buffer
Support asynchronous/synchronous (with start/stop bit) transfer
Baud rate : 4808/5208/9615/10417/19230/38460/62500/500000 bps (asynchronous) 
500 K/1 M/2 Mbps (synchronous) at System clock 
=
 16 MHz
Full duplex double buffer
Asynchronous (start-stop synchronized) and CLK-synchronous communication
Baud rate : 1202/2404/4808/9615/19230/31250/38460/62500 bps (asynchronous) 
62.5 K/125 K/250 K/500 K/1 M/2 Mbps (synchronous) at 6, 8, 10, 12, 16 MHz
Transfer can be started from MSB or LSB
Supports internal clock synchronized transfer and external clock synchronized transfer
Supports positive-edge and nagative-edge clock synchronization
Baud rate : 31.25 K/62.5 K/125 K/500 K/1 Mbps at System clock 
=
 16 MHz
10-bit or 8-bit resolution
8 input channels
Conversion time : 26.3 
μ
s (per one channel) 
UART1
 (SCI) 
Serial I/O
A/D Converter