參數(shù)資料
型號： MB90F439PF
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 16-bit Proprietary Microcontroller
中文描述： 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 20 MM, 3.35 MM HEIGHT, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù)： 10/58頁
文件大小： 629K
代理商： MB90F439PF
MB90435 Series
10
(Continued)
Pin No.
Pin name
Circuit
type
Function
LQFP
*2
QFP
*1
20
22
P44
G
General I/O port. This function is enabled when UART1
disables the clock output.
SCK1
Serial clock pulse I/O pin for UART1. This function is
enabled when UART1 enables the serial clock output.
22
24
P45
G
General I/O port. This function is enabled when UART1
disables the serial data output.
SOT1
Serial data output pin for UART1. This function is enabled when
UART1 enables the serial data output.
23
25
P46
G
General I/O port. This function is enabled when the Extended
I/O serial interface disables the serial data output.
SOT2
Serial data output pin for the Extended I/O serial interface. This
function is enabled when the Extended I/O serial interface
enables the serial data output.
24
26
P47
G
General I/O port. This function is enabled when the Extended
I/O serial interface disables the clock output.
SCK2
Serial clock pulse I/O pin for the Extended I/O serial interface .
This function is enabled when the Extended I/O serial interface
enables the Serial clock output.
26
28
P50
D
General I/O port. This function is always enabled.
SIN2
Serial data input pin for the Extended I/O serial interface . Set
the corresponding Port Direction Register to input if this
function is used.
27 to 30
29 to 32
P51 to P54
D
General I/O port. This function is always enabled.
INT4 to INT7
External interrupt request input pins for INT4 to INT7. Set the
corresponding Port Direction Register to input if this function is
used.
31
33
P55
D
General I/O port. This function is always enabled.
ADTG
Trigger input pin for the A/D converter. Set the corresponding
Port Direction Register to input if this function is used.
36 to 39
38 to 41
P60 to P63
E
General I/O port. This function is enabled when the analog
input enable register specifies a port.
AN0 to AN3
Analog input pins for the 8/10-bit A/D converter. This function is
enabled when the analog input enable register specifies A/D.
41 to 44
43 to 46
P64 to P67
E
General I/O port. The function is enabled when the analog
input enable register specifies a port.
AN4 to AN7
Analog input pins for the 8/10-bit A/D converter. This function is
enabled when the analog input enable register specifies A/D.
45
47
P56
D
General I/O port. This function is always enabled.
TIN0
Event input pin for the 16-bit reload timers 0. Set the
corresponding Port Direction Register to input if this function is
used.
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