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參數(shù)資料
| 型號： | MB90F428GCPFV |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-Bit Original Microcontroller |
| 中文描述： | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 36/84頁 |
| 文件大?。?/td> | 501K |
| 代理商： | MB90F428GCPFV |
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MB90420G/425G Series
36
2.
Watchdog Timer/Time Base Timer/Watch Timer
The watchdog timer, timer base timer, and watch timer have the following circuit configuration.
Watchdog timer : Watchdog counter, control register, watchdog reset circuit
Time base timer : 18-bit timer, interval interrupt control circuit
Watch timer
: 15-bit timer, interval interrupt control circuit
(1) Watchdog timer function
The watchdog timer is composed of a 2-bit watchdog counter that uses the carry signal from the 18-bit time
base timer or 15-bit watch timer as a clock source, plus a control register and watchdog reset control circuit.
After startup, this function will reset the CPU if not cleared within a given time.
(2) Time base timer function
The time base timer is an 18-bit free-run counter (time base counter) synchronized with the internal count clock
(base oscillator divided by 2) , with an interval timer function providing a selection of four interval times. Other
functions include a timer output for an oscillator stabilization wait time and clock feed to the watchdog timer or
other operating clocks. Note that the time base timer uses the main clock regardless of the setting of the MCS
bit or SCS bit in the CKSCR register.
(3) Watch timer function
The watch timer provides functions including a clock source for the watchdog timer, a sub clock base oscillator
stabilization wait timer, and an interval timer to generate an interrupt at fixed intervals. Note that the watch timer
uses the sub clock regardless of the setting of the MCS bit or SCS bit in the CKSCR register.
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