參數(shù)資料
型號(hào)： MB90F423GBPF
廠商： FUJITSU LTD
元件分類(lèi)： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100
封裝： PLASTIC, QFP-100
文件頁(yè)數(shù)： 41/85頁(yè)
文件大?。?/td> 930K
代理商： MB90F423GBPF
MB90420G/425G Series
46
8.
DTP/External Interrupt Circuit
The DTP (Data transfer peripheral) /external interrupt circuit is located between an externally connected periph-
eral device and the F2MC-16LX CPU and sends interrupt requests or data transfer requests generated from the
peripheral device to the CPU, thereby generating external interrupt requests or starting the expanded intelligent
I/O services (EI2OS) .
(1) DTP/external interrupt function
The DTP/external interrupt function uses a signal input from the DTP/external interrupt pin as a startup source.
And it is accepted by the CPU by the same procedure as a normal hardware interrupt, and can generate an
external interrupt or start the expanded intelligent I/O service (EI2OS) .
When the interrupt is accepted by the CPU, if the corresponding expanded intelligent I/O service (EI2OS) is
prohibited the interrupt operates as an external interrupt function and branches to an interrupt routine. If the
EI2OS is permitted the interrupt functions as a DTP function, using EI2OS for automatic data transfer, then
branching to an interrupt routine after the completion of the specified number of data transfers.
ICR : Interrupt control register
External interrupt
DTP function
Input pins
8 pins (P50/INT0/ADTG to P53/INT3, P00/SIN0/INT4 to P03/INT7)
Interrupt sources
Request level setting register (ELVR) sets the detection level, or selected edge for
each pin
“H” level/ “L” level/ rising edge/falling
edge input
“H” level/ “L” level input
Interrupt numbers
#16 (10H) , #18 (12H) , #20 (14H) , #22 (16H) , #24 (18H) , #26 (1AH)
Interrupt control
DTP/interrupt enable register (ENIR) permits/prohibits interrupt request output
Interrupt flags
DTP/interrupt enable register (EIRR) stores interrupt sources
Process selection
When EI2OS prohibited (ICR : ISE
= 0)
When EI2OS is enabled (ICR : ISE
= 1)
Processing
Branch to external interrupt processing
routine
EI2OS performs automatic data transfer,
then after a specified number of cycles,
branches to an interrupt routine
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