參數(shù)資料
型號(hào)： MB90F394H
廠商： Fujitsu Limited
英文描述： 16-bit Proprietary Microcontroller CMOS
中文描述： 16位微控制器專有的CMOS
文件頁數(shù)： 39/61頁
文件大?。?/td> 317K
代理商： MB90F394H
MB90390 Series
39
(Continued)
: The interrupt request flag is cleared by the EI
2
OS interrupt clear signal.
: The interrupt request flag is cleared by the EI
2
OS interrupt clear signal. A stop request is available.
N/A : The interrupt request flag is not cleared by the EI
2
OS interrupt clear signal.
Notes : For a peripheral module with two interrupt causes for a single interrupt number, both interrupt request flags
are cleared by the EI
2
OS interrupt clear signal.
At the end of EI
2
OS, the EI
2
OS clear signal will be asserted for all the interrupt flags assigned to the same
interrupt number. If one interrupt flag starts the EI
2
OS and in the meantime another interrupt flag is set by
hardware event, the later event is lost because the flag is cleared by the EI
2
OS clear signal caused by the
first event. So it is recommended not to use the EI
2
OS for this interrupt number.
If EI
2
OS is enabled, EI
2
OS is initiated when one of the two interrupt signals in the same interrupt control
register (ICR) is asserted. This means that different interrupt sources share the same EI
2
OS Descriptor
which should be unique for each interrupt source. For this reason, when one interrupt source uses the
EI
2
OS, the other interrupt should be disabled.
Interrupt cause
EI
2
OS
clear
Interrupt vector
Interrupt control
register
Number
Address
Number
Address
(UART 2 RX) / UART 3 RX
#39
FFFF60
H
ICR14
0000BE
H
(UART 2 TX) / UART 3 TX
#40
FFFF5C
H
Flash Memory
N/A
#41
FFFF58
H
ICR15
0000BF
H
Delayed interrupt
N/A
#42
FFFF54
H
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