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參數(shù)資料
| 型號： | MB90F367 |
| 廠商： | Fujitsu Limited |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16位微控制器專有 |
| 文件頁數(shù)： | 2/59頁 |
| 文件大?。?/td> | 262K |
| 代理商： | MB90F367 |
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MB90360 Series
2
■
FEATURES
Clock
Built-in PLL clock frequency multiplication circuit
Selection of machine clocks (PLL clocks) is allowed among frequency division by 2 on oscillation clock and
multiplication of 1 to 6 times of oscillation clock (for 4 MHz oscillation clock, 4 MHz to 24 MHz) .
Operation by sub-clock (up to 50 kHz : 100 kHz oscillation clock divided two) is allowed (devices without S-
suffix only) .
Minimum execution time of instruction : 42 ns (when operating with 4-MHz oscillation clock and 6-time multiplied
PLL clock) .
Clock monitor function (MB90x367x only)
Main clock or sub-clock is monitored independently
Internal CR oscillation clock (100 kHz typical) can be used as sub-clock
Instruction system best suited to controller
16 Mbytes CPU memory space
24-bit internal addressing
Wide choice of data types (bit, byte, word, and long word)
Wide choice of addressing modes (23 types)
Enhanced multiply-divide instructions with sign and RETI instructions
Enhanced high-precision computing with 32-bit accumulator
Instruction system compatible with high-level language (C language) and multitask
Employing system stack pointer
Enhanced various pointer indirect instructions
Barrel shift instructions
Increased processing speed
4-byte instruction queue
Powerful interrupt function
Powerful 8-level, 34-condition interrupt feature
Up to 8 channel external interrupts are supported
Automatic data transfer function independent of CPU
Expanded intelligent I/O service function (EI
2
OS) : up to 16 channels
Low-power consumption (standby) mode
Sleep mode (a mode that halts CPU operating clock)
Main timer mode (timebase timer mode that is transferred from main clock mode)
PLL timer mode (timebase timer mode that is transferred from PLL clock mode)
Watch mode (a mode that operates sub-clock and watch timer only, devices without S-suffix)
Stop mode (a mode that stops oscillation clock and sub-clock)
CPU blocking operation mode
Process
CMOS technology
I/O port
General-purpose input/output port (CMOS output)
- 34 ports (devices without S-suffix)
- 36 ports (devices with S-suffix)
Sub-clock pin (X0A and X1A)
Provided (used for external oscillation), devices without S-suffix
Not provided (used with internal CR oscillation in sub-clock mode) , devices with S-suffix
(Continued)
相關PDF資料 |
PDF描述 |
|---|---|
| MB90F367PMT | 16-bit Proprietary Microcontroller |
| MB90F367S | 16-bit Proprietary Microcontroller |
| MB90F367SPMT | 16-bit Proprietary Microcontroller |
| MB90F367T | 16-bit Proprietary Microcontroller |
| MB90F367TPMT | 16-bit Proprietary Microcontroller |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MB90F367TPMCR-GE1 | 制造商:FUJITSU 功能描述: |
| MB90F367TPMCR-G-JNE1 | 制造商:FUJITSU 功能描述: |
| MB90F367TPMCR-GSE1 | 制造商:FUJITSU 功能描述: |
| MB90F367TSPMCR-GE1 | 制造商:FUJITSU 功能描述: |
| MB90F367TSPMCR-GSE1 | 制造商:FUJITSU 功能描述: |
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