參數(shù)資料
型號(hào)： MB90F351TE
廠商： Fujitsu Limited
英文描述： 16-bit Proprietary Microcontrollers
中文描述： 16位微控制器專有
文件頁數(shù)： 72/85頁
文件大小： 880K
代理商： MB90F351TE
MB90350E Series
72
(13) I
2
C Timing
(T
A
=
40
°
C to
+
125
°
C, V
CC
=
AV
CC
=
5.0 V
±
10
%
, f
CP
≤
24 MHz, V
SS
=
AV
SS
=
0 V)
*1 : R,C : Pull-up resistor and load capacitor of the SCL and SDA lines.
*2 : The maximum t
HDDAT
has to meet at least that the device does not exceed the “L” width (t
LOW
) of the SCL signal.
*3 : A Fast-mode I
2
C -bus device can be used in a Standard-mode I
2
C-bus system, but the requirement
t
SUDAT
≥
250 ns must be met.
*4 : For use at over 100 kHz, set the machine clock to at least 6 MHz.
*5 : Refer to “
Note of SDA, SCL set-up time”.
Parameter
Symbol
Condition
Standard-mode
Fast-mode*
4
Unit
Min
Max
Min
Max
SCL clock frequency
f
SCL
R
=
1.7 k
,
C
=
50 pF*
1
0
100
0
400
kHz
Hold time for (repeated) START condition
SDA
↓
→
SCL
↓
“L” width of the SCL clock
t
HDSTA
4.0
0.6
μ
s
t
LOW
4.7
1.3
μ
s
μ
s
“H” width of the SCL clock
t
HIGH
4.0
0.6
Set-up time for a repeated START condition
SCL
↑
→
SDA
↓
Data hold time
SCL
↓
→
SDA
↓
↑
Data set-up time
SDA
↓
↑
→
SCL
↑
Set-up time for STOP condition
SCL
↑
→
SDA
↑
Bus free time between STOP condition and
START condition
t
SUSTA
4.7
0.6
μ
s
t
HDDAT
0
3.45*
2
0
0.9*
3
μ
s
t
SUDAT
250*
5
100*
5
ns
t
SUSTO
4.0
0.6
μ
s
t
BUS
4.7
1.3
μ
s
SDA
SCL
6 t
CP
Note of SDA, SCL set-up time
Input data set-up time
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