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參數(shù)資料
| 型號： | MB90F351ESPMC |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-bit Proprietary Microcontrollers |
| 中文描述： | 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-64 |
| 文件頁數(shù)： | 17/85頁 |
| 文件大?。?/td> | 880K |
| 代理商： | MB90F351ESPMC |
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MB90350E Series
17
(Continued)
Pin No.
Pin name
I/O
Circuit
type*
Function
39
P17
G
General purpose I/O port. The register can be set to select whether to use
a pull-up resistor. This function is enabled in single-chip mode.
AD15
Input/output pin for external bus address data bus bit 15.
This function is enabled when external bus is enabled.
40 to 43
P20 to P23
G
General purpose I/O ports. The register can be set to select whether to use
a pull-up resistor. In external bus mode, the pins are enabled as a general-
purpose I/O port when the corresponding bit in the external address output
control register (HACR) is 1.
A16 to A19
Output pins for A16 to A19 of the external address data bus.
When the corresponding bit in the external address output control register
(HACR) is 0, the pins are enabled as high address output pins A16 to A19.
PPG9 (8) ,
PPGB (A) ,
PPGD (C) ,
PPGF (E)
Output pins for PPGs
44
P24
G
General purpose I/O port. The register can be set to select whether to use
a pull-up resistor. In external bus mode, the pin is enabled as a general-
purpose I/O port when the corresponding bit in the external address output
control register (HACR) is 1.
A20
Output pin for A20 of the external address data bus. When the correspond-
ing bit in the external address output control register (HACR) is 0, the pin is
enabled as high address output pin A20.
IN0
Data sample input pin for input capture ICU0
51
P25
G
General purpose I/O port. The register can be set to select whether to use
a pull-up resistor. In external bus mode, the pin is enabled as a general-
purpose I/O port when the corresponding bit in the external address output
control register (HACR) is 1.
A21
Output pin for A21 of the external address data bus. When the correspond-
ing bit in the external address output control register (HACR) is 0, the pin is
enabled as high address output pin A21.
IN1
Data sample input pin for input capture ICU1
ADTG
Trigger input pin for A/D converter
52
P44
H
General purpose I/O port
SDA0
Serial data I/O pin for I
2
C 0
FRCK0
Input pin for the 16-bit I/O Timer 0
53
P45
H
General purpose I/O port
SCL0
Serial clock I/O pin for I
2
C 0
FRCK1
Input pin for the 16-bit I/O Timer 1
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MB90F351ESPMC-GSE1 | 制造商:FUJITSU 功能描述: |
| MB90F351ESPMCR-GSE1 | 制造商:FUJITSU 功能描述: |
| MB90F351PMC-GSE1 | 制造商:FUJITSU 功能描述: |
| MB90F351PMC-GS-SPE1 | 制造商:FUJITSU 功能描述: |
| MB90F351SPMC-GSE1 | 制造商:FUJITSU 功能描述: |
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