參數(shù)資料
型號(hào)： MB90F349CESPFV
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 16-bit Proprietary Microcontroller CMOS
中文描述： 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù)： 17/85頁
文件大小： 1169K
代理商： MB90F349CESPFV
MB90340E Series
17
(Continued)
Pin No.
Pin name
I/O
Circuit
type*
3
Function
QFP100*
1
LQFP100*
2
61
59
P84
SCK0
INT15R
P85
SIN1
P86
SOT1
P87
SCK1
V
CC
V
SS
P90 to P93
PPG1, 3, 5, 7
P94 to P97
OUT0 to
OUT3
PA0
RX0
INT8R
PA1
TX0
F
General purpose I/O pin.
Clock I/O pin for UART0
External interrupt request input pin
General purpose I/O pin.
Serial data input pin for UART1
General purpose I/O pin.
Serial data output pin for UART1
General purpose I/O pin.
Clock I/O pin for UART1
Power (3.5 V to 5.5 V) input pin
GND pin
General purpose I/O pin
Output pins for PPGs
General purpose I/O pin
Waveform output pins for output compares. This function is
enabled when the OCU enables waveform output.
General purpose I/O pin.
RX input pin for CAN0 Interface
External interrupt request input pin
General purpose I/O pin.
TX Output pin for CAN0
General purpose I/O pins. The register can be set to select
whether to use a pull-up resistor. This function is enabled in
single-chip mode.
I/O pins for 8 lower bits of the external address/data bus.
This function is enabled when the external bus is enabled.
External interrupt request input pins.
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
I/O pin for the external address/data bus.
This function is enabled when the external bus is enabled.
Event input pin for the reload timer
62
60
M
63
61
F
64
62
F
65
66
63
64
67 to 70
65 to 68
F
71 to 74
69 to 72
F
75
73
F
76
74
F
77 to 84
75 to 82
P00 to P07
G
AD00 to AD07
INT8 to INT15
85
83
P10
G
AD08
TIN1
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