
MB90860E Series
11
(Continued)
Pin No.
Pin name
I/O
Circuit
type*
3
Function
QFP100*
1
LQFP100*
2
9
7
P34
G
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor. This function is enabled either
in single-chip mode or with the hold function disabled.
Hold request input pin. This function is enabled when both the
external bus and the hold function are enabled.
Waveform output pin for output compare 4.
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor. This function is enabled either
in single-chip mode or with the hold function disabled.
Hold acknowledge output pin. This function is enabled when
both the external bus and the hold function are enabled.
Waveform output pin for output compare 5.
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor. This function is enabled either
in single-chip mode or with the external ready function disabled.
External ready input pin. This function is enabled when both the
external bus and the external ready function are enabled.
Waveform output pin for output compare 6.
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor. This function is enabled either
in single-chip mode or with the clock output disabled.
Clock output pin. This function is enabled when both the
external bus and clock output are enabled.
Waveform output pin for output compare 7.
General purpose I/O pins.
(devices with S-suffix)
Input pins for sub-clock
(devices without S-suffix)
Power (3.5 V to 5.5 V) input pin
GND pin
This is the power supply stabilization capacitor pin. It should be
connected to a higher than or equal to 0.1
μ
F ceramic
capacitor.
General purpose I/O pin.
Trigger input pin for input capture 6.
External interrupt request input pin (sub)
HRQ
OUT4
10
8
P35
G
HAK
OUT5
11
9
P36
G
RDY
OUT6
12
10
P37
G
CLK
OUT7
13, 14
11, 12
P40, P41
F
X0A , X1A
B
15
16
13
14
V
CC
V
SS
17
15
C
K
18
16
P42
IN6
INT9R
F