參數(shù)資料
型號: MB90676
廠商: Fujitsu Limited
英文描述: 16-Bit Proprietary Microcontroller(16位專用微控制器)
中文描述: 16位微控制器專利(16位專用微控制器)
文件頁數(shù): 53/111頁
文件大小: 736K
代理商: MB90676
53
MB90670/675 Series
8. OCU (Output Compare)
The output compare unit consists of a 24-bit OCU register, a comparator, and an OCU control register. When
the contents of the OCU register and the 24-bit timer counter match, the match detection signal is output. This
match detection signal can be used to change the output values of the corresponding pins, or else to generate
an interrupt. One output compare block consists of four channels, and time division comparisons can be made
with one comparator for the four channels.
The compare precision of this OCU is four times the operation cycle of the 24-bit free-run timer; if the 24-bit
free-run timer operates at 4 MHz, the compare precision is 1
μ
s.
The MB90670/675 series has two of these OCUs on chip.
(1) Register Configuration
OCU control register 00 upper
OCU control register 10 upper
channel 1 Address: channel 0 000059
H
channel 1 00005D
H
OCU control register 01 upper
OCU control register 11 upper
Address: channel 0 00005B
H
channel 1 00005F
H
7
6
5
4
3
2
1
0
Bit no.
CCR00
CCR10
CCR01
CCR11
CCR01
CCR11
CCR00
CCR10
Bit no.
15
14
13
12
11
10
9
8
Read/write
Initial value
(—)
(—)
(—)
(—)
(—)
(—)
(—)
(—)
(R/W)
(0)
4
(R/W)
(0)
3
(R/W)
(0)
2
(R/W)
(0)
1
Read/write
Initial value
(—)
(—)
(—)
(—)
(—)
(—)
(—)
(—)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
Read/write
Initial value
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
Read/write
Initial value
(R/W)
(1)
(R/W)
(1)
(R/W)
(1)
(R/W)
(1)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
OCU control register 01 lower
OCU control register 11 lower
Address: channel 0 00005A
H
channel 1 00005E
H
15
14
13
12
11
10
9
8
Bit no.
OCU control register 00 lower
OCU control register 10 lower
Address: channel 0 000058
H
channel 1 00005C
H
MD2
MD3
MD1
MD0
DOT2
DOT3
DOT1 DOT0
IC2
IC3
IC1
IC0
ICE2
ICE3
ICE1
ICE0
Bit no.
7
6
5
0
CPE2
CPE3
CPE1 CPE0
SEL2
SEL3
SEL1 SEL0
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