參數(shù)資料
型號(hào): MB90673PFV
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 16-bit Proprietary Microcontroller
中文描述: 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80
封裝: PLASTIC, LQFP-80
文件頁(yè)數(shù): 39/124頁(yè)
文件大?。?/td> 2584K
代理商: MB90673PFV
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39
MB90670/675 Series
(Continued)
: Can be used
: Can not be used
: Can be used. With EI
2
OS stop function.
: Can be used if interrupt request using ICR are not commonly used.
*1: In MB90670 series, this interrupt vector is not used because the series does not have the I
2
C interface.
*2: Interrupt levels for peripherals that commonly use the ICR register are in the same level.
When the extended intelligent I/O service (EI
2
OS) is specified in a peripheral device commonly using the ICR
register, only one of the functions can be used.
When the extended intelligent I/O service (EI
2
OS) is specified for one of the peripheral functions, interrupts
can not be used on the other function.
*3: Only 16-bit reload timer conforms to the extended intelligent I/O service (EI
2
OS). Because the 8/16-bit PPG
timer does not conform to the extended intelligent I/O service (EI
2
OS), disable interrupts of the 8/16-bit PPG
timer when using the extended intelligent I/O service (EI
2
OS) in the 16-bit reload timer.
*4: The level shows priority of same level of interrupt invoked simultaneously.
Interrupt source
EI
2
OS
support
Interrupt vector
Interrupt control
register
Priority
*
4
Number
Address
ICR
Address
UART1 (SCI) transmission
complete
# 35
23
H
FFFF70
H
ICR12
0000BC
H
*
2
High
UART0 transmission complete
# 36
24
H
FFFF6C
H
UART1 (SCI) reception complete
# 37
25
H
FFFF68
H
ICR13
0000BD
H
*
2
I
2
C interface*
1
×
# 38
26
H
FFFF64
H
UART0 reception complete
# 39
27
H
FFFF60
H
ICR14
0000BE
H
Delayed interrupt generation
module
×
# 42
2A
H
FFFF54
H
ICR15
0000BF
H
Low
×
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