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參數(shù)資料
| 型號： | MB90662AP-SH |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16-BIT, MROM, 32 MHz, MICROCONTROLLER, PDIP64 |
| 封裝： | SHRINK, PLASTIC, DIP-64 |
| 文件頁數(shù)： | 78/84頁 |
| 文件大小： | 1440K |
| 代理商： | MB90662AP-SH |
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78
MB90660A Series
Table 21 Bit Manipulation Instructions [21 Instructions]
*1: 8 when branching, 7 when not branching
*2: 7 when branching, 6 when not branching
*3: 10 when condition is satisfied, 9 when not satisfied
*4: Undefined count
*5: Until condition is satisfied
Note: For an explanation of “(a)” to “(d)”, refer to Table 4, “Number of Execution Cycles for Each Type of Addressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
Mnemonic
#
~
RG
B
Operation
LH AH
I
S
T
N
Z
V
C
RMW
MOVB
MOVB
MOVB
A, dir:bp
A, addr16:bp
A, io:bp
MOVB
MOVB
MOVB
dir:bp, A
addr16:bp, A
io:bp, A
SETB
SETB
SETB
dir:bp
addr16:bp
io:bp
CLRB
CLRB
CLRB
dir:bp
addr16:bp
io:bp
BBC
BBC
BBC
dir:bp, rel
addr16:bp, rel
io:bp, rel
BBS
BBS
BBS
dir:bp, rel
addr16:bp, rel
io:bp, rel
SBBS
addr16:bp, rel
WBTS
io:bp
WBTC
io:bp
3
4
3
3
4
3
3
4
3
3
4
3
4
5
4
4
5
4
5
3
3
5
5
4
7
7
6
7
7
7
7
7
7
*
1
*
1
*
2
*
1
*
1
*
2
*
3
*
4
*
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
(b)
(b)
(b)
2
×
(b)
2
×
(b)
2
×
(b)
2
×
(b)
2
×
(b)
2
×
(b)
2
×
(b)
2
×
(b)
2
×
(b)
(b)
(b)
(b)
(b)
(b)
(b)
2
×
(b)
*
5
*
5
byte (A)
←
(dir:bp) b
byte (A)
←
(addr16:bp) b
byte (A)
←
(io:bp) b
bit (dir:bp) b
←
(A)
bit (addr16:bp) b
←
(A)
bit (io:bp) b
←
(A)
bit (dir:bp) b
←
1
bit (addr16:bp) b
←
1
bit (io:bp) b
←
1
bit (dir:bp) b
←
0
bit (addr16:bp) b
←
0
bit (io:bp) b
←
0
Branch when (dir:bp) b = 0
Branch when (addr16:bp) b = 0
Branch when (io:bp) b = 0
Branch when (dir:bp) b = 1
Branch when (addr16:bp) b = 1
Branch when (io:bp) b = 1
Branch when (addr16:bp) b = 1, bit = 1
Wait until (io:bp) b = 1
Wait until (io:bp) b = 0
Z
Z
Z
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
*
*
*
–
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*
*
*
*
*
*
–
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*
*
*
*
*
*
–
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*
*
*
*
*
*
*
–
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*
*
*
*
*
*
*
*
*
–
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*
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