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參數(shù)資料
| 型號： | MB90611APF |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數(shù)： | 9/91頁 |
| 文件大小： | 1521K |
| 代理商： | MB90611APF |
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MB90610A Series
9
(Continued)
*1: FPT-100P-M05
*2: FPT-100P-M06
Pin no.
Pin name
Circuit
type
Function
LQFP*
1
QFP*
2
57
59
P91
D
(CMOS/H)
General purpose I/O port
This applies when serial data output is disabled for UART1.
SOT1
Serial data output pin for UART1
This applies when serial data output is enabled for UART1.
58
60
P92
D
(CMOS/H)
General purpose I/O port
This applies when the UART1 clock output is disabled.
SCK1
Clock I/O pin for UART1
This applies when the UART1 clock output is enabled.
As the input operates continuously when UART1 is set to
input operation, output to the pin from other functions must
be stopped unless done intentionally.
59
61
P93
D
(CMOS/H)
General purpose I/O port
This applies in all cases.
SIN2
Serial data input pin for UART2
As the input operates continuously when UART2 is set to
input operation, output to the pin from other functions must
be stopped unless done intentionally.
60
62
P94
D
(CMOS/H)
General purpose I/O port
This applies when serial data output is disabled for UART2.
SOT2
Serial data output pin for UART2
This applies when serial data output is enabled for UART2.
61
63
P95
D
(CMOS/H)
General purpose I/O port
This applies when the UART2 clock output is disabled.
SCK2
Clock I/O pin for UART2
This applies when the UART2 clock output is enabled.
As the input operates continuously when UART2 is set to
input operation, output to the pin from other functions must
be stopped unless done intentionally.
62
64
CS0
J
(CMOS)
Chip select pin for program ROM
63 to 69
65 to 71
PA1 to PA7
I
(CMOS)
General purpose I/O ports
This applies for pins with chip select output disabled by the
chip select control register.
CS1 to CS7
Output pins for the chip select function
This applies for pins with chip select output enabled by the
chip select control register.
70
72
P50
I
(CMOS)
General purpose I/O port
This applies when CLK output is enabled.
CLK
CLK output pin
相關PDF資料 |
PDF描述 |
|---|---|
| MB90611APFV | 16-bit Proprietary Microcontroller |
| MB90611A | 16-Bit Proprietary Microcontroller(16位專用微控制器) |
| MB90613A | 16-Bit Proprietary Microcontroller(16位專用微控制器) |
| MB90622A | 16-Bit Proprietary Microcontroller(16位專用微控制器) |
| MB90623A | 16-Bit Proprietary Microcontroller(16位專用微控制器) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MB90611APFR-G-BNDE1 | 制造商:FUJITSU 功能描述: |
| MB90611APFR-G-JNE1 | 制造商:FUJITSU 功能描述: |
| MB90611APFV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller |
| MB90613A | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller |
| MB90622A | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller |
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