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參數(shù)資料
| 型號(hào)： | MB90598 |
| 廠商： | Fujitsu Limited |
| 英文描述： | Quadruple 2-Input Positive-OR Gate 14-CDIP -55 to 125 |
| 中文描述： | 16位微控制器專有 |
| 文件頁(yè)數(shù)： | 23/47頁(yè) |
| 文件大?。?/td> | 657K |
| 代理商： | MB90598 |
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MB90595/595G Series
23
(Continued)
Address
Note: Initial value of “
_
” represents unused bit; “X” represents unknown value.
Addresses in the rage 0000
H
to 00FF
H
, which are not listed in the table, are reserved for the primary functions
of the MCU. A read access to these reserved addresses results in reading “X”, and any write access should
not be performed.
Register
Abbreviation Access
Peripheral
Initial value
192C
H
Output Compare Register 2
(low-order)
OCCP2
R/W
Output Compare 2/3
XXXXXXXX
B
192D
H
Output Compare Register 2
(high-order)
OCCP2
R/W
XXXXXXXX
B
192E
H
Output Compare Register 3
(low-order)
OCCP3
R/W
XXXXXXXX
B
192F
H
Output Compare Register 3
(high-order)
OCCP3
R/W
XXXXXXXX
B
1930
H
to 19FF
H
Reserved
1A00
H
to 1AFF
H
CAN Controller. Refer to section about CAN Controller
1B00
H
to 1BFF
H
CAN Controller. Refer to section about CAN Controller
1C00
H
to 1EFF
H
Reserved
1FF0
H
Program Address Detection
Register 0 (low-order)
PADR0
R/W
Address Match
Detection Function
XXXXXXXX
B
1FF1
H
Program Address Detection
Register 0 (middle-order)
XXXXXXXX
B
1FF2
H
Program Address Detection
Register 0 (high-order)
XXXXXXXX
B
1FF3
H
Program Address Detection
Register 1 (low-order)
PADR1
R/W
XXXXXXXX
B
1FF4
H
Program Address Detection
Register 1 (middle-order)
XXXXXXXX
B
1FF5
H
Program Address Detection
Register 1 (high-order)
XXXXXXXX
B
1FF6
H
to 1FFF
H
Reserved
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB90598G | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller |
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| MB90598PF | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller |
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| MB90611APF | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller |
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