參數(shù)資料
型號(hào): MB90497GPMC
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP64
封裝: 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-64
文件頁(yè)數(shù): 30/96頁(yè)
文件大?。?/td> 2317K
代理商: MB90497GPMC
MB90495G Series
36
DS07-13713-6E
2.
Time-base Timer
The time-base timer is an 18-bit free-run counter (time-base counter) for counting up in synchronization with the
main clock (1/2 main oscillation clock) .
Four interval times are available, and interrupt requests can be generated for each interval time.
The time-base timer also has a function for supplying timers for oscillation stabilize standby time and operating
clocks for peripheral devices.
Interval timer feature
When the time-base timer counter reaches the interval set by the interval time selection bits (TBTC : TBC1,
TBC0) , it generates an overflow (TBTC : TBOF
= 1) and interrupt request.
If the interrupts due to overflow generation are enabled (TBTC : TBIE
= 1) , when an overflow is generated
(TBTC : TBOF
= 1) , an interrupt is generated.
Select from the following 4 time-base timer intervals :
Time-base timer interval times
HCLK : oscillation clock
The number in parentheses ( ) for 4-MHz oscillation clock operation
Time-base Timer Block Diagram
See below for the actual interrupt request number of the time-base timer :
Interrupt request number : #16 (10H)
Count Clock
Interval Time
2/HCLK (0.5
μs)
212/HCLK (approx. 1.0 ms)
214/HCLK (approx. 4.1 ms)
216/HCLK (approx. 16.4 ms)
219/HCLK (approx. 131.1 ms)
TBIE
TBOF TBR TBC1 TBC0
× 21
21/HCLK
× 22 × 23
× 28 × 29 × 210 × 211 × 212 × 213 × 214 × 215 × 216 × 217 × 218
OF
To PPG timer
Time-base timer counter
To watchdog timer
To clock controller
oscillation stabilize
standby time selector
Interval
Timer selector
Set TBOF
Clear TBOF
Clear counter
circuit
Power-on Reset
CKSCR
: MCS = 1 0*1
CKSCR
: SCS = 0 1*2
Stop Mode
Time-base timer control register
(TBTC)
Time-base timer interrupt signal
Re-
served
OF
: overflow
HCLK : oscillation clock
*1
: Switch machine clock from main clock to PLL clock
*2
: Switch machine clock from subclock to main clock
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