參數(shù)資料
型號: MB90483C
廠商: Fujitsu Limited
英文描述: 16-bit Proprietary Microcontroller
中文描述: 16位微控制器專有
文件頁數(shù): 43/120頁
文件大?。?/td> 1241K
代理商: MB90483C
MB90480/485 Series
43
5.
8/16-bit PPG
The 8/16-bit PPG is an 8-bit reload timer module that produces a PPG output using a pulse from the timer
operation. Hardware resources include 6
×
8-bit down counters, 12
×
8-bit reload timers, 3
×
16-bit control
registers, 6
×
external pulse output pins, and 6
×
interrupt outputs. Note that MB90480/485 series has six channels
for 8-bit PPG use, which can also be combined as PPG0
+
PPG1, PPG2
+
PPG3, and PPG4
+
PPG5 to operate
as a three-channel 16-bit PPG. The following is a summary of functions.
8-bit PPG output 6-channel independent mode : Provides PPG output operation on six independent channels.
16-bit PPG output operation mode : Provides 16-bit PPG output on three channels. The six original channels
are used in combination as PPG0
+
PPG1, PPG2
+
PPG3, and PPG4
+
PPG5.
8
+
8-bit PPG output operation mode : Output from PPG0 (PPG2/PPG4) is used as clock input to PPG1 (PPG3/
PPG5) to provide to 8-bit PPG output at any desired period length.
PPG output operation : Produces pulse waves at any desired period and duty ratio. The PPG module can also
be used with external circuits as a D/A converter.
(1) Register List
PPGC0/PPGC2/PPGC4 (PPG0/PPG2/PPG4 operation mode control register)
PPGC1/PPGC3/PPGC5 (PPG1/PPG3/PPG5 operation mode control register)
PPG01/PPG23/PPG45 (PPG0 to PPG5 output control register)
PPLL0 to PPLL5 (Reload register L)
00002E
H
000030
H
000032
H
000034
H
000036
H
000038
H
PPLH0 to PPLH5 (Reload register H)
00002F
H
000031
H
000033
H
000035
H
000037
H
000039
H
00003A
H
00003C
H
00003E
H
Read/write
Initial value
00003B
H
00003D
H
00003F
H
Read/write
Initial value
000040
H
000042
H
000044
H
Read/write
Initial value
Read/write
Initial value
Read/write
Initial value
X
R/W
0
R/W
0
R/W
0
X
X
1
7
6
5
4
3
2
1
0
R/W
0
PEN0
PE00
PIE0
PUF0
Reserved
X
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
1
15
14
13
12
11
10
9
8
R/W
0
PEN1
PE10
PIE1
PUF1
MD1
MD0
Reserved
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
7
6
5
4
3
2
1
0
PCS1
R/W
0
PCS2
PCS0
PCM2
PCM1
PCM0
Reserved
Reserved
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
7
6
5
4
3
2
1
0
D06
R/W
X
D07
D05
D04
D03
D02
D01
D00
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
15
14
13
12
11
10
9
8
D14
R/W
X
D15
D13
D12
D11
D10
D09
D08
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