
MB90455 Series
2
 16 Mbyte CPU memory space
 24-bit internal addressing
 Instruction system best suited to controller
 Wide choice of data types (bit, byte, word, and long word)
 Wide choice of addressing modes (23 types)
 Enhanced multiply-divide instructions and RETI instructions
 Enhanced high-precision computing with 32-bit accumulator
 Instruction system compatible with high-level language (C language) and multitask
 Employing system stack pointer
 Enhanced various pointer indirect instructions
 Barrel shift instructions
 Increased processing speed
 4-byte instruction queue
 Powerful interrupt function with 8 levels and 34 factors
 Automatic data transfer function independent of CPU
 Expanded intelligent I/O service function (EI
2
 OS): Maximum of 16 channels
 Low power consumption (standby) mode
 Sleep mode (a mode that halts CPU operating clock)
 Time-base timer mode (a mode that operates oscillation clock, sub clock, time-base timer and clock timer only)
 Clock mode (a mode that operates sub clock and clock timer only)
 Stop mode (a mode that stops oscillation clock and sub clock)
 CPU blocking operation mode
 Process
 CMOS technology
 I/O port
 General-purpose input/output port (CMOS output): 34 ports(MB90F455/F456/F457, MB90455/456/457) (in-
cluding 4 high-current output ports) (When sub clock is not used, 36 ports(MB90F455S/F456S/F457S,
MB90455S/456S/457S))
 Timer
 Time-base timer, clock timer, watchdog timer: 1 channel
 8/16-bit PPG timer: 8-bit x 4 channels, or 16-bit x 2 channels
 16-bit reload timer: 2 channels
 16-bit input/output timer
- 16-bit free run timer: 1 channel
- 16-bit input capture: (ICU): 4 channels
Interrupt request is issued upon latching a count value of 16-bit free run timer by detection of an edge on pin
input.
 UART 1: 1 channel
 Equipped with full-duplex double buffer
 Clock-asynchronous or clock-synchronous serial transmission is available
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