參數(shù)資料
型號(hào): MB90443G
廠商: Fujitsu Limited
英文描述: 16-bit Proprietary Microcontroller
中文描述: 16位微控制器專有
文件頁數(shù): 33/61頁
文件大?。?/td> 644K
代理商: MB90443G
MB90440G Series
33
(Continued)
Notes :
N/A : The interrupt request flag is not cleared by the EI
2
OS interrupt clear signal.
For a peripheral module with two interrupt causes for a single interrupt number, both interrupt request
flags are cleared by the EI
2
OS interrupt clear signal.
At the end of EI
2
OS, the EI
2
OS clear signal will be asserted for all the interrupt flags assigned to the same
interrupt number. If one interrupt flag starts the EI
2
OS and in the meantime another interrupt flag is set by
hardware event, the later event is lost because the flag is cleared by the EI
2
OS clear signal caused by the
first event. So it is recommended not to use the EI
2
OS for this interrupt number.
If EI
2
OS is enabled, EI
2
OS is initiated when one of the two interrupt signals in the same interrupt control
register (ICR) is asserted. This means that different interrupt causes share the same EI
2
OS descriptor
which should be unique for each interrupt cause. For this reason, when one interrupt cause uses the
EI
2
OS, the other interrupt should be disabled.
Interrupt cause
EI
2
OS
support
Interrupt vector
Interrupt control register
Number
Address
Number
Address
Flash memory
N/A
#41
FFFF58
H
ICR15
0000BF
H
Delayed interrupt generation module
N/A
#42
FFFF54
H
H
*1
*2
: The interrupt request flag is cleared by the EI
2
OS interrupt clear signal.
: The interrupt request flag is cleared by the EI
2
OS interrupt clear signal. A stop request is available.
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