參數(shù)資料
型號(hào)： MB90242A
廠(chǎng)商： FUJITSU LTD
元件分類(lèi)： 微控制器/微處理器
英文描述： 16-Bit Proprietary Microcontroller(16位專(zhuān)用微控制器)
中文描述： 16-BIT, 32 MHz, MICROCONTROLLER, PQFP80
封裝： PLASTIC, LQFP-80
文件頁(yè)數(shù)： 8/57頁(yè)
文件大小： 754K
代理商： MB90242A
MB90242A Series
8
Pin no.
LQFP*
39 to 41
Pin name
Circuit type
Function
MD0 to MD2
C
Operating mode selection input pins
Connect directly to V
Hardware standby input pin
General-purpose I/O ports
This function is available when neither output of 16-bit timer #0 nor
#1 is enabled.
16-bit timer output pins
This function is available when outputs of both 16-bit timer #0 and
#1 are enabled.
General-purpose I/O port
General-purpose I/O port
This function is available when clock output of SSI #1 is disabled.
SSI #1 clock I/O pin
General-purpose I/O port
This function is always valid.
SSI #1 data input pin
This pin, as required, is used for input during SSI #1 input
operation, and it is necessary to disable input/output for other
functions from this pin unless such input/output is made
intentionally.
General-purpose I/O port
This function is available when data output of SSI #1 is disabled.
SSI #1 data output pin
This function is available when data output of SSI #1 is enabled.
General-purpose I/O ports
This function is always valid.
External interrupt input pins
These pins, as required, are used for input while external interrupt is
enabled, and it is necessary to disable input/output for other
functions from these pins unless such input/output is made
intentionally.
General-purpose I/O port
This function is always valid.
External interrupt input pin
This pin, as required, is used for input while external interrupt is
enabled, and it is necessary to disable input/output for other
functions from this pin unless such input/output is made
intentionally.
This pin is clamped to “LOW” level when CPU is in the “STOP”
status. Use INT0 or INT1 to resume operation.
A/D converter activation trigger input pin
This pin, as required, is used for input while A/D converter is waiting
for activation, and it is necessary to disable input/output for other
functions from this pin unless such input/output is made
intentionally.
CC
or V
SS
.
42
HST
P70, P71
D
F
43, 44
TOT0, TOT1
45
46
P72
P73
F
F
SCK1
P74
47
F
SID1
48
P75
F
SOD1
49, 50
P80, P81
G
INT0, INT1
51
P82
F
INT2
ATG
* :FPT-80P-M05
(Continued)
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