
3-24 Chapter 3 CPU
MB89190/190A series
T Reset factor and oscillation stabilization wait time
The oscillation stabilization wait time may or may not be used depending on the operation mode and
option setting of the power-on reset at the reset occurrence. After reset termination, operation starts in
the normal operation mode irrespective of the operation mode before reset (standby mode etc.) or the
reset factor. So, when a reset occurs while the original oscillation is halted or during the oscillation
stabilization wait time, the oscillation stabilization wait reset state occurs. However, with the power-on
reset ‘not provided’, the oscillation stabilization wait time is not taken when the power is turned on or at an
external reset.
The normal mode operation takes no oscillation stabilization wait time for software reset and watchdog
reset.
Table 3-5b shows the relationships between reset factor, oscillation stabilization wait time and reset
operation (mode fetch).
Table 3-5b Reset Factor and Oscillation Stabilization Wait Time
Reset operation and oscillation stabilization wait time
Reset factor
Operating state
When power-on reset ‘provided’
When power-on reset ‘not
provided’
External reset
*1
At power-on and in
stop mode
The reset operation is performed
when the external reset is
canceled after the oscillation
stabilization wait time has elapsed.
*2
The reset state continues until
the external reset is cancelled.
The reset is performed after
cancellation.
Software reset and watchdog reset
The reset operation is performed after a reset with four instruction
cycles occurs.
*3
Power-on reset
The reset operation is performed
after the elapse of the oscillation
stabilization wait time after power-
on.
*2
An external reset circuit is
needed to continue generating
the reset until the oscillation
stabilizes at power-on.
*1: External reset in normal mode does not use the oscillation stabilization wait time. The reset operation is
performed after external reset is canceled.
*2: When selecting the option with the reset output ‘provided’, the L level is output to the RST pin during the clock
oscillation stabilization wait time.
*3: When selecting the option with the reset output ‘provided’, the L level is output to the RST pin for four
instruction cycles.