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參數(shù)資料
| 型號(hào)： | MB89F969A |
| 廠商： | Fujitsu Limited |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-bit Proprietary Microcontroller |
| 中文描述： | 8位微控制器專有 |
| 文件頁數(shù)： | 16/48頁 |
| 文件大小： | 546K |
| 代理商： | MB89F969A |
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MB89960 Series
16
I
PROGRAMMING AND ERASING FLASH MEMORY ON THE MB89F969A
1.
Flash Memory
The flash memory is located between 1000
H
and FFFF
H
in the CPU memory map and incorporates a flash
memory interface circuit that allows read access and program access from the CPU to be performed in the same
way as mask ROM. Programming and erasing flash memory is also performed via the flash memory interface
circuit by executing instructions in the CPU. This enables the flash memory to be updated in place under the
control of the CPU, providing an efficient method of updating program and data.
2.
Flash Memory Features
60 K byte
×
8-bit configuration (16 K
+
8 K
+
8 K
+
28 K sectors)
Automatic programming algorithm (Embedded algorithm* : Equivalent to MBM29LV200)
Includes an erase pause and restart function
Data polling and toggle bit for detection of program/erase completion
Detection of program/erase completion via CPU interrupt
Compatible with JEDEC-standard commands
Sector Protection (sectors can be combined in any combination)
No. of program/erase cycles : 10,000 (min.)
Embedded Algorithm is a trademark of Advanced Micro Devices.
3.
Procedure for Programming and Erasing Flash Memory
Programming and reading flash memory cannot be performed at the same time. Accordingly, to program or
erase flash memory, the program must first be copied from flash memory to RAM so that programming can be
performed without program access from flash memory.
4.
Flash Memory Register
Control status register (FMCS)
5.
Sector Configuration
The table below shows the sector configuration of flash memory and lists the addresses of each sector for both
during CPU access a flash memory programming.
Sector configuration of flash memory
Flash Memory
* : Programmer address
The programmer address is the address to be used instead of the CPU address when programming data from
a parallel flash memory programmer. Use the programmer address on programming or erasing using a general-
purpose parallel programmer.
CPU Address
Programmer Address
16 K bytes
FFFF
H
to C000
H
1FFFF
H
to 1C000
H
8 K bytes
BFFF
H
to A000
H
1BFFF
H
to 1A000
H
8 K bytes
9FFF
H
to 8000
H
19FFF
H
to 18000
H
28 K bytes
7FFF
H
to 1000
H
17FFF
H
to 11000
H
R
R/W
R/W
RDY
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
002E
H
Address
000X00-0
B
Initial value
Reserved Reserved
Reserved
R/W
R/W
R/W
R/W
INTE
RDYINT
WE
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