參數(shù)資料
型號: MB89943
廠商: Fujitsu Limited
英文描述: Quadruple 2-Line To 1-Line Data Selectors/Multiplexers 20-LCCC -55 to 125
中文描述: 8位微控制器專有
文件頁數(shù): 30/40頁
文件大?。?/td> 562K
代理商: MB89943
30
MB89940 Series
7. Notes on Using A/D Converter
Input impedance of the analog input pins
The A/D converter used for the MB89940 series contains a sample hold circuit as illustrated below to fetch
analog input voltage into the sample hold capacitor for eight instruction cycles after activating A/D conversion.
For this reason, if the output impedance of the external circuit for the analog input is high, analog input voltage
might not stabilize within the analog input sampling period. Therefore, it is recommended to keep the output
impedance of the external circuit low (below 10 k
).
Note that if the impedance cannot be kept low, it is recommended to connect an external capacitor of about
0.1
μ
F for the analog input pin.
Error
The smaller the | AV
CC
– AV
SS
|, the greater the error would become relatively.
V
OT
V
NT
V
(N + 1)T
V
FST
Digital output
(1 LSB
×
N + V
OT
)
0000
0000
0000
0001
1111
1111
1110
1111
1 LSB =
AVR
256
Linearity error =
Differential linearity error =
Analog input
Actual conversion value
Theoretical conversion value
Total error =
V
NT
– (1 LSB
×
N + V
OT
)
1 LSB
V
( N + 1 ) T
– V
NT
1 LSB
V
NT
– (1 LSB
×
N + 1 LSB)
– 1
1 LSB
Linearity error
Analog Input Equivalent Circuit
Sample hold circuit
C .
Analog channel selector
Close for 8 instruction cycles after activating
A/D conversion.
If the analog input
impedance is higher
than 10 k
, it is
recommended to
connect an external
capacitor of approx.
0.1
μ
F.
Analog input pin
Comparator
R .
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