參數(shù)資料
型號(hào)： MB89923PF
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP80
封裝： 20 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件頁(yè)數(shù)： 42/44頁(yè)
文件大小： 1091K
代理商： MB89923PF
MB89920 Series
DS07-12526-2E
7
■ PIN DESCRIPTION
(Continued)
Pin no.
Pin name
Circuit
type
Function
17
X1
A
Clock oscillator pins
18
X0
16
MODA
B
Operation mode selection input pin
Connect this pin to VSS (GND).
20
HST
B
Hardware standby input pin
21
RST
C
Reset I/O pin
This pin is an N-ch open-drain output type with a pull-up resistor,
and a hysteresis input type.
“L” is output from this pin by an internal reset source. The internal
circuit is initialized by the input of “L”.
11,
12
P90/RTO0,
P91/RTO1
D
General-purpose I/O ports
A pull-up resistor option is provided. Also serve as an output
compare data output.
13
P92/BUZ/CLK
D
General-purpose I/O port
Also serves as a buzzer/clock output.
14
P93/PWM0
D
General-purpose I/O port
A pull-up resistor option is provided.
Also serves as an 8-bit PWM output.
19
P94/PWM1
D
General-purpose I/O port
A pull-up resistor option is provided.
Also serves as an 8-bit PWM output.
22
P95/SCK
E
General-purpose I/O port
A pull-up resistor option is provided.
Also serves as the clock I/O (SCK) for the serial I/O. The SCK
input is a hysteresis input.
The output type can be switched between N-ch open-drain and
CMOS.
23
P96/SO
D
General-purpose I/O port
A pull-up resistor option is provided.
Also serves as the data output (SO) for the serial I/O. The output
type can be switched between N-ch open-drain and CMOS.
24
P97/SI
E
General-purpose I/O port
A pull-up resistor option is provided.
Also serves as the data input (SI) for the serial I/O.
25
P32/UCK
E
General-purpose I/O port
A pull-up resistor option is provided.
Also serves as a UART clock I/O (UCK). The UCK input is
hysteresis input.
The output type can be switched between N-ch open-drain and
CMOS.
26
P31/UO
D
General-purpose I/O port
A pull-up resistor option is provided.
Also serves as a UART data output (UO).
The output type can be switched between N-ch open-drain and
CMOS.
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