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參數(shù)資料
| 型號： | MB89655APFV |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS 16-CDIP -55 to 125 |
| 中文描述： | 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 42/52頁 |
| 文件大?。?/td> | 779K |
| 代理商： | MB89655APFV |
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42
MB89650AR Series
(Continued)
Columns indicate the following:
Mnemonic:
Assembler notation of an instruction
~:
Number of instructions
#:
Number of bytes
Operation:
Operation of an instruction
TL, TH, AH:
A content change when each of the TL, TH, and AH instructions is executed. Symbols in
the column indicate the following:
“
–
”
indicates no change.
dH is the 8 upper bits of operation description data.
AL and AH must become the contents of AL and AH immediately before the instruction
is executed.
00 becomes 00.
N, Z, V, C:
An instruction of which the corresponding flag will change. If + is written in this column,
the relevant instruction will change its corresponding flag.
OP code:
Code of an instruction. If an instruction is more than one code, it is written according to
the following rule:
Example: 48 to 4F
←
This indicates 48, 49, ... 4F.
Symbol
Meaning
EP
Extra pointer EP (16 bits)
PC
Program counter PC (16 bits)
SP
Stack pointer SP (16 bits)
PS
Program status PS (16 bits)
dr
Accumulator A or index register IX (16 bits)
CCR
Condition code register CCR (8 bits)
RP
Register bank pointer RP (5 bits)
Ri
General-purpose register Ri (8 bits, i = 0 to 7)
Indicates that the very
×
is the immediate data.
(Whether its length is 8 or 16 bits is determined by the instruction in use.)
Indicates that the contents of
×
is the target of accessing.
(Whether its length is 8 or 16 bits is determined by the instruction in use.)
The address indicated by the contents of
×
is the target of accessing.
(Whether its length is 8 or 16 bits is determined by the instruction in use.)
×
( ×
)
((
×
))
相關PDF資料 |
PDF描述 |
|---|---|
| MB89655AR | DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS 16-CFP -55 to 125 |
| MB89657APF | Quadruple Bus Buffer Gates With 3- State Outputs 20-LCCC -55 to 125 |
| MB89657APFV | Quadruple Bus Buffer Gates With 3- State Outputs 14-CDIP -55 to 125 |
| MB89657AR | Quadruple Bus Buffer Gates With 3- State Outputs 14-CFP -55 to 125 |
| MB89P657A | 8-bit Proprietary Microcontroller |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MB89655AR | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89656APF | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89656APFV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89656AR | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89657A | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
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