- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376149 > MB89636R (Fujitsu Limited) Quadruple 2-Input Positive-NAND Gates 20-LCCC -55 to 125 PDF資料下載
參數(shù)資料
| 型號： | MB89636R |
| 廠商： | Fujitsu Limited |
| 英文描述： | Quadruple 2-Input Positive-NAND Gates 20-LCCC -55 to 125 |
| 中文描述： | 8位微控制器專有 |
| 文件頁數(shù)： | 49/59頁 |
| 文件大?。?/td> | 864K |
| 代理商： | MB89636R |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁當前第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁
MB89630R Series
49
I
INSTRUCTIONS (136 INSTRUCTIONS)
Execution instructions can be divided into the following four groups:
Transfer
Arithmetic operation
Branch
Others
Table 1 lists symbols used for notation of instructions.
Table 1 Instruction Symbols
Columns indicate the following:
Mnemonic: Assembler notation of an instruction
~:
The number of instructions
#:
The number of bytes
Operation:
Operation of an instruction
TL, TH, AH:
A content change when each of the TL, TH, and AH instructions is executed. Symbols in
the column indicate the following:
“
–
”
indicates no change.
dH is the 8 upper bits of operation description data.
AL and AH must become the contents of AL and AH prior to the instruction executed.
00 becomes 00.
N, Z, V, C:
An instruction of which the corresponding flag will change. If + is written in this column,
the relevant instruction will change its corresponding flag.
OP code:
Code of an instruction. If an instruction is more than one code, it is written according to
the following rule:
Example: 48 to 4F
←
This indicates 48, 49, ... 4F.
Symbol
dir
off
ext
#vct
#d8
#d16
dir: b
rel
@
A
AH
AL
T
TH
TL
IX
EP
PC
SP
PS
dr
CCR
RP
Ri
Meaning
Direct address (8 bits)
Offset (8 bits)
Extended address (16 bits)
Vector table number (3 bits)
Immediate data (8 bits)
Immediate data (16 bits)
Bit direct address (8:3 bits)
Branch relative address (8 bits)
Register indirect (Example: @A, @IX, @EP)
Accumulator A (Whether its length is 8 or 16 bits is determined by the instruction in use.)
Upper 8 bits of accumulator A (8 bits)
Lower 8 bits of accumulator A (8 bits)
Temporary accumulator T (Whether its length is 8 or 16 bits is determined by the instruction in use.)
Upper 8 bits of temporary accumulator T (8 bits)
Lower 8 bits of temporary accumulator T (8 bits)
Index register IX (16 bits)
Extra pointer EP (16 bits)
Program counter PC (16 bits)
Stack pointer SP (16 bits)
Program status PS (16 bits)
Accumulator A or index register IX (16 bits)
Condition code register CCR (8 bits)
Register bank pointer RP (5 bits)
General-purpose register Ri (8 bits, i = 0 to 7)
Indicates that the very
×
is the immediate data.
(Whether its length is 8 or 16 bits is determined by the instruction in use.)
Indicates that the contents of
×
is the target of accessing.
(Whether its length is 8 or 16 bits is determined by the instruction in use.)
The address indicated by the contents of
×
is the target of accessing.
(Whether its length is 8 or 16 bits is determined by the instruction in use.)
×
(
×
)
((
×
))
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MB89636RP-SH | Quadruple 2-Input Positive-NAND Gates 14-CFP -55 to 125 |
| MB89636RPF | 8-bit Proprietary Microcontroller |
| MB89636RPFM | 8-bit Proprietary Microcontroller |
| MB89637R | Hex Inverters 14-CFP -55 to 125 |
| MB89637RPF | Hex Inverters 20-LCCC -55 to 125 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB89636RPF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-bit Proprietary Microcontroller |
| MB89636RPFM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-bit Proprietary Microcontroller |
| MB89636RP-SH | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-bit Proprietary Microcontroller |
| MB89637 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
| MB89637PF | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8-bit Proprietary Microcontroller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。