參數(shù)資料
型號: MB89635RPMC
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP64
封裝: 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-64
文件頁數(shù): 33/60頁
文件大?。?/td> 1472K
代理商: MB89635RPMC
MB89630R Series
DS07-12531-4E
39
(9) Serial I/O Timing
(VCC = 5.0 V
±10%, FCH = 10 MHz, AVSS = VSS= 0.0 V, TA = –40
°C to +85°C)
* : For information on tinst, see “(4) Instruction Cycle”.
Parameter
Symbol
Pin name
Condition
Value
Unit Remarks
Min.
Max.
Serial clock cycle time
tSCYC
SCK1, UCK1,
UCK2
Internal
shift clock
mode
2 tinst*—
μs
SCK1
↓ → SO1 time
UCK1
↓ → UO1 time
UCK2
↓ → UO2 time
tSLOV
SCK1, SO1
UCK1, UO1
UCK2, UO2
–200
200
ns
Valid SI1
→ SCK1 ↑
Valid UI1
→ UCK1 ↑
Valid UI2
→ UCK2 ↑
tIVSH
SI1, SCK1
UI1, UCK1
UI2, UCK2
1/2 tinst*—
μs
SCK1
↑ → valid SI1 hold time
UCK1
↑ → valid UI1 hold time
UCK2
↑ → valid UI2 hold time
tSHIX
SCK1, SI1
UCK1, UI1
UCK2, UI2
1/2 tinst*—
μs
Serial clock “H” pulse width
tSHSL
SCK1, UCK1,
UCK2
External
shift clock
mode
1 tinst*—
μs
Serial clock “L” pulse width
tSLSH
SCK1, UCK1,
UCK2
1 tinst*—
μs
SCK1
↓ → SO1 time
UCK1
↓ → UO1 time
UCK2
↓ → UO2 time
tSLOV
SCK1, SO1
UCK1, UO1
UCK2, UO2
0
200
ns
Valid SI1
→ SCK1 ↑
Valid UI1
→ UCK1 ↑
Valid UI2
→ UCK2 ↑
tIVSH
SI1, SCK1
UI1, UCK1
UI2, UCK2
1/2 tinst*—
μs
SCK1
↓ → valid SI1 hold time
UCK1
↓ → valid UI1 hold time
UCK2
↓ → valid UI2 hold time
tSHIX
SCK1, SI1
UCK1, UI1
UCK2, UI2
1/2 tinst*—
μs
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