![](http://datasheet.mmic.net.cn/330000/MB89560A_datasheet_16436974/MB89560A_4.png)
MB89560A Series
4
(Continued)
Part number
*1 : When booster is used, the bias is reduced by 1/3. It can be selected by mask option.
*2 : Voltage varies with product.
*3 : When external ROM is used, EPROM: MBM27C512-20 should be used, the operating voltage: 4.5 V to 5.5 V.
*4 : I
2
C is complied to Intel Corp. System Management Bus Rev. 1.0 specification and to the Philips I
2
C specification.
*5 : 1 t
inst
= one instruction cycle (execution time) which can be selected as 1/4, 1/8, 1/16, or 1/64 of main clock
if main clock mode is selected, or 1/2 of the subclock if subclock mode is selected.
*6 : Varies with conditions such as the operating frequency. (See “
I
ELECTRICAL CHARACTERISTICS.”)
*7 : F
CH
: main clock source oscillation, F
CL
: sub clock source oscillation
Parameter
MB89567A
MB89567AC
MB89P568
MB89PV560
I
2
C interface*
4
Not
Available
1 channel
High speed UART
Transfer data length: 4-, 6-, 7-, 8-bit
Transfer rate (300 bps to 192000 bps /9.216 MHz main clock)
support sub-clock mode
UART/SIO
Transfer data length: 7-, 8-bit for UART, 8-bit for SIO
Transfer rate (1201 bps to 78125 bps / 10 MHz main clock)
support sub-clock mode
8-bit serial I/O
8-bit, LSB first/MSB first selectability
Transfer clocks (one external shift clock, three internal shift clocks: 2 t
inst
, 8 t
inst
, 32 t
inst
) *
5
LCD
Common output: 4 (Max)
Segment output: 24 (Max)
LCD driving power (bias) pins: 4
LCD display RAM size: 12 bytes (24 × 4 bits, Max 96 pixels)
Duty LCD mode and Static LCD mode
Booster for LCD driving: option*
1
Dividing resistor for LCD driving: option
Wild register
Maximum of 6-byte data can be assigned in 6 different address.
Used to replace any data in the ROM when specific address and data are assigned in Wild
register.
Wild register can be set up by using different communication methods through the device.
External interrupt
1 (wake-up
function)
8 independent channels (interrupt vector, request flag, request output enable)
Edge selectability (rising/falling)
Used also for wake-up from stop/sleep mode. (edge detection is also permitted in stop mode.)
External interrupt
2 (wake-up
function)
4 channels (“L” level interrupts, independent input enable).
Used also for wake-up from stop/sleep mode. (Low-level detection is also permitted in stop
mode.)
Standby mode
Sub clock mode, sleep mode, stop mode and clock mode
Process
CMOS
Operating voltage *
6
2.2 V to 5.5 V
2.7 V to 5.5 V
2.7 V to 5.5 V*
3