![](http://datasheet.mmic.net.cn/330000/MB89535A_datasheet_16436924/MB89535A_4.png)
MB89530A Series
4
(Continued)
Part number
*1 : Depends on operating frequency.
*2 : Using external ROM and MBM27C512.
*3 : t
inst
represents instruction execution time. This can be selected as 1/4, 1/8, 1/16, 1/64 of the main clock cycle
or 1/2 of the sub clock cycle.
Note : MB89535A/537A/538A have no built-in I
2
C functions.
To use I
2
C functions, choose the MB89PV530/MB89P538/F538/537AC/538AC.
Parameter
MB89535A
MB89537A/
537AC
MB89538A/
538AC
MB89F538
MB89P538
MB89PV530
Pulse width
count timer
8-bit one-shot timer operation
(supports underflow output, operating clock period : 1, 4, 32 t
inst
*
3
, external)
8-bit reload timer operation
(supports square wave output, operating clock period : 1, 4, 32 t
inst
*
3
, external)
8-bit pulse width measurement operation
(continuous measurement, H width measurement, L width measurement,
↑
to
↑
,
↓
to
↓
, H
width measurement and
↑
to
↑
)
16-bit timer operation (operating clock period : 1 t
inst
*
3
, external)
16-bit event counter operation (select rising, falling, or both edges)
16-bit
×
1 ch
8 bit length
Selection of LSB first or MSB first
Transfer clock (2, 8, 32 t
inst
*
3
, external)
CLK synchronous/CLK asynchronous data transfer capability (8, 9 bit with parity bit, or 7,8 bit
without parity bit) .
Built-in baud rate generator provides selection of 14 baud rate settings.
CLK synchronous/CLK asynchronous data transfer capability (4, 6, 7, 8 bit with parity bit, or 5,
7, 8, 9 bit without parity bit) .
Built-in baud rate generator provides selection of 14 baud rate settings.
External clock output, 2-channel 8-bit PWM timer output also available for baud rate
settings.
Single-clock system : 4 channels independent, dual-clock system : 3 channels independent.
Selection of rising, falling, or both edge detection.
Can be used for recovery from standby mode (edge detection also available in stop mode)
Except MB89F538 : 8 ch, MB89F538 : 7 ch
Can be used for recovery from standby mode.
Can generate square wave signals with programmable period.
6-bit
×
1 channel or 12-bit
×
2 channels.
1-channel , compatible with Intel System Administrator bus version 1.0 and
Philips I
2
C specifications.
2-line communications
(
on MB89PV530
/
P538
/
F538/537AC
/
538AC
)
10-bit resolution
×
8 channels.
A/D conversion functions (conversion time : 60 t
inst
*
3
)
Supports repeated calls from external clock (except MB89F538) .
Supports repeated calls from internal clock.
Standard voltage input provided (AVR)
16-bit timer/
counter
Serial I/O
UART/SIO
UART
External
interrupt 1
External
interrupt 2
6-bit PPG,
12-bit PPG
I
2
C bus
interface
A/D converter
Standby modes
(power saving
modes)
Process
Sleep mode, stop mode, sub clock mode, watch mode.
CMOS
P