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參數(shù)資料
| 型號(hào)： | MB881821APVA1-G-ERE1 |
| 廠商： | FUJITSU LTD |
| 元件分類(lèi)： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 100 MHz, OTHER CLOCK GENERATOR, PBCC20 |
| 封裝： | 3.50 X 3.50 MM, 0.60 MM HEIGHT, 0.50 MM PITCH, PLASTIC, BCC-20 |
| 文件頁(yè)數(shù)： | 24/36頁(yè) |
| 文件大?。?/td> | 1059K |
| 代理商： | MB881821APVA1-G-ERE1 |
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MB88182
30
DS04-29138-3E
■ CLOCK INPUT VIA COUPLING CAPACITY
It is possible to input clocks to the CKIN pin via the coupling capacity as shown in the following figure. The device
input part contains the CMOS inverter and the feedback resistor (1 M
Ω). The clock input via the coupling capacity
operates near the threshold level of the CMOS inverter, therefore the current for the capacity connection clock
input increases compared to the normal input.
CC
VIC
Rf (1 M
Ω)
Input clock
LSI external
LSI internal
CKIN pin
Input via
coupling capacity
Clock after the coupling
capacity passes by
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| MB881821BPVA1-G-ERE1 | 100 MHz, OTHER CLOCK GENERATOR, PBCC20 |
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| MB881822APVA1-G-EFE1 | 100 MHz, OTHER CLOCK GENERATOR, PBCC20 |
| MB881822APVA1-G-ERE1 | 100 MHz, OTHER CLOCK GENERATOR, PBCC20 |
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