參數(shù)資料
型號(hào)： MB86974APFV
元件分類： 微控制器/微處理器
英文描述： 4 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP144
封裝： 20 X 20 MM, 0.50 MM PITCH, PLASTIC, LQFP-144
文件頁(yè)數(shù)： 1/64頁(yè)
文件大?。?/td> 605K
代理商： MB86974APFV
PAUSE FLOW CONTROL
Preliminary 12/14/98
10Mb/s-/100Mb/s Ethernet
Controller
MB86974
Features
100/10-Mbit/s operation, full Media Independent Interface
(MII)
Low-power Complementary Metal Oxide Semiconductor
(CMOS) design, 3.3-volt operation (5V tolerant I/O)
Direct PCI interface with DMA burst mode, burst size con-
trol, big- and little- endian support
IEEE 802.3
u standard compliance
Flow-control PAUSE operation, power management, early
transmit and receive
Large arbitrated Direct Memory Access (DMA) and First-
In, First-Out (FIFO) buffers
Full-duplex capability
On-chip Content Addressable Memory (CAM) and optional
external CAM
Electrically Erasable Programable Read Only Memory
(EEPROM) support
144-pin Plastic Quad Flat Package (PQFP)
Package
144-pin, plastic QFP
FPT-144P-M08
Description
The Fujitsu MB86974 is a high-quality Ethernet controller that
offers many benefits and advantages to its users.
The controller operates at either 100-Mbit/s or 10-Mbit/s, and
fully supports the IEEE 802.3
u flow control.
When in half-duplex mode, the controller implements the
Institute of Electrical and Electronics Engineers (IEEE) 802.3
Carrier Sense Multiple Access with Collision Detection (CSMA/
CD) protocol. When in full-duplex mode, it implements the
IEEE 802.3 Media Access Controller (MAC) control layer.
The controller also offers the following: (1) PAUSE operation
for flow control, including programmable support for
additional MAC control functions; (2) direct connection to the
32-bit Peripheral Components Interconnect (PCI) local bus,
using the bus-master burst transfer mode to efficiently move data
to and from system memory; (3) on-chip memory for buffering,
so external local-buffer memory is not needed; (4) an optional
10 Mb/s 7-wire interface.
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