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參數(shù)資料
| 型號(hào)： | MB8504S072AC-100 |
| 廠商： | Fujitsu Limited |
| 英文描述： | CMOS 4M×72Bit Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 4M×72位 同步動(dòng)態(tài)RAM) |
| 中文描述： | 4米× 72Bit的CMOS同步動(dòng)態(tài)隨機(jī)存取存儲(chǔ)器（SDRAM）的CMOS（4分× 72位同步動(dòng)態(tài)RAM）的 |
| 文件頁(yè)數(shù)： | 1/15頁(yè) |
| 文件大?。?/td> | 362K |
| 代理商： | MB8504S072AC-100 |
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DS05-11113-1E
FUJITSU SEMICONDUCTOR
DATA SHEET
MEMORY
Buffered
4 M
×
SYNCHRONOUS DYNAMIC RAM DIMM
MB8504S072AC-100/-84/-67
72 BIT
200-pin, 2-bank, based on 2 M
×
8 BIT SDRAMs with PLL
I
DESCRIPTION
The Fujitsu MB8504S072AC is a fully decoded, CMOS Synchronous Dynamic Random Access Memory (SDRAM)
module consisting of eighteen MB81117822A devices which organized as two banks of 1 M
is possible to minimize the skews of input signals such as clock and address signal by the PLL clock driver and
register buffers mounted. The MB8504S072AC is optimized for those applications requiring high speed, high
performance and large memory storage, and high density memory organizations.
This module is ideally suited for supercomputers, workstations, high-end PCs, laser printers, high resolution
graphic adapters, accelerators, and other applications where a simple interface is needed.
×
8 bits. This module
I
PRODUCT LINE & FEATURES
Parameter
MB8504S072AC-100
100 MHz max.
10 ns max. (CL = 4)
15 ns max. (CL = 3)
54.5 ns max.
24.5 ns max.
9 ns max. (CL = 4)
9.5 ns max. (CL = 3)
6253 mW max.
572 mW max.
MB8504S072AC-84
84 MHz max.
12 ns max. (CL = 4)
17 ns max. (CL = 3)
56.5 ns max.
26.5 ns max.
9 ns max. (CL = 4)
9.5 ns max. (CL = 3)
5782 mW max.
508 mW max.
MB8504S072AC-67
67 MHz max.
15 ns max. (CL = 4)
20 ns max. (CL = 3)
60.5 ns max.
30.5 ns max.
9.5 ns max. (CL = 4)
10.5 ns max. (CL = 3)
5314 mW max.
443 mW max.
Clock Frequency
Burst Mode Cycle Time
RAS Access Time
CAS Access Time
Output Valid from Clock
Power
Dissipation
Burst Mode
Power Down Mode
Buffered 200-pin DIMM Socket Type
(Lead pitch: 1.27 mm)
Conformed to JEDEC Standard
Organization: 4,194,304 words
×
72 bits (ECC)
Memory: MB81117822A (2 M
×
8, 2-bank)
×
18 pcs.
3.3 V
±
0.3 V Supply Voltage
All input/output LVTTL compatible
2048 Refresh Cycle every 32.8 ms
Auto and Self Refresh
CKE Power Down Mode
Output Enable and Input Data Mask
PLL Clock Driver/Register Buffer/Input Buffer
Module size:
1.5” (height)
×
6.05” (length)
×
0.16” (thick)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MB8504S072AC-67 | CMOS 4M×72Bit Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 4M×72位 同步動(dòng)態(tài)RAM) |
| MB8504S072AC-84 | CMOS 4M×72Bit Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 4M×72位 同步動(dòng)態(tài)RAM) |
| MB8504S072AD-100 | CMOS 4M×72Bit Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 4M×72位 同步動(dòng)態(tài)RAM) |
| MB8504S072AD-67 | CMOS 4M×72Bit Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 4M×72位 同步動(dòng)態(tài)RAM) |
| MB8504S072AD-84 | CMOS 4M×72Bit Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 4M×72位 同步動(dòng)態(tài)RAM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB8508S064CE-100 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8 M x 64 BIT SYNCHRONOUS DYNAMIC RAM SO-DIMM |
| MB85101BAN | 制造商:MURATA 制造商全稱:Murata Manufacturing Co., Ltd. 功能描述:HIGH FREQUENCY CERAMIC CAPACITORS |
| MB85101BBN | 制造商:MURATA 制造商全稱:Murata Manufacturing Co., Ltd. 功能描述:HIGH FREQUENCY CERAMIC CAPACITORS |
| MB85101CAN | 制造商:MURATA 制造商全稱:Murata Manufacturing Co., Ltd. 功能描述:HIGH FREQUENCY CERAMIC CAPACITORS |
| MB85101CBN | 制造商:MURATA 制造商全稱:Murata Manufacturing Co., Ltd. 功能描述:HIGH FREQUENCY CERAMIC CAPACITORS |
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