參數(shù)資料
型號: MB84VD22184EG-90
廠商: Fujitsu Limited
英文描述: 32M (x 8/x16) FLASH MEMORY & 4M (x 8/x16) STATIC RAM
中文描述: 32M的(x 8/x16)閃存
文件頁數(shù): 58/61頁
文件大小: 1589K
代理商: MB84VD22184EG-90
MB84VD2218XEC/EE/2219XEC/EE
-90
58
CE2s Controlled Data Retention Mode (Note 3)
Notes: 1. In CE1s controlled data retention mode, input level of CE2s should be fixed Vccs to Vccs–0.2 V or Vss
to 0.2 V during data retention mode. Other input and input/output pins can be used between –0.3 V to
Vccs+0.3 V.
2. When CE1s is operating at the V
IH
min. level (2.2 V), the standby current is given by I
SB1
s during the
transition of V
CC
s from 3.6 to 2.2 V.
3. In CE2s controlled data retention mode, input and input/output pins can be used between
–0.3 V to Vccs+0.3 V.
I
PIN CAPACITANCE
Note: Test conditions T
A
= 25°C, f = 1.0 MHz
I
HANDLING OF PACKAGE
Please handle this package carefully since the sides of packages are right angle.
I
CAUTION
1) The high voltage (V
ID
) can not apply to address pins and control pins except RESET. Therefore, it can not
use autoselect and sector protect function by applying the high voltage (V
ID
) to specific pins.
2) For the sector protection, since the high voltage (V
ID
) can be applied to the RESET, it can be protected the
sector useing “Extended sector protect” command.
Parameter
Symbol
Parameter Description
Test Setup
Typ.
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0
11
14
pF
C
OUT
Output Capacitance
V
OUT
= 0
12
16
pF
C
IN2
Control Pin Capacitance
V
IN
= 0
14
16
pF
C
IN3
WP/ACC Pin Capacitance
V
IN
= 0
21.5
26
pF
V
CC
s
2.7 V
GND
DATA RETENTION MODE
V
IH
V
IL
CE2s
t
CDR
t
R
0.2 V
V
DH
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