參數(shù)資料
型號: MB84VA2105-10
廠商: FUJITSU LTD
元件分類: 存儲器
英文描述: 16M (x 8) FLASH MEMORY & 1M (x 8) STATIC RAM
中文描述: SPECIALTY MEMORY CIRCUIT, PBGA48
封裝: PLASTIC, FBGA-48
文件頁數(shù): 23/29頁
文件大小: 401K
代理商: MB84VA2105-10
23
MB84VA2104
-10
/MB84VA2105
-10
Write Cycle (SRAM)
Parameter
Symbol
Write Cycle (Note 4) (WE control) (SRAM)
Parameter Description
Min.
Max.
Unit
t
WC
Write Cycle Time
100
ns
t
WP
Write Pulse Width
60
ns
t
CW
Chip Enable to End of Write
80
ns
t
AS
Address Setup Time
0
ns
t
WR
Write Recovery Time
0
ns
t
ODW
WE Low to Output High-Z
40
ns
t
OEW
WE High to Output Active
0
ns
t
DS
Data Setup Time
60
ns
t
DH
Data Hold Time
0
ns
t
WC
t
AS
t
WP
t
WR
t
CW
t
ODW
t
OEW
t
DS
t
DH
VALID DATA IN
ADDRESSES
WE
CE1s
D
OUT
D
IN
CE2s
t
CW
Notes:
2. If CE1s goes LOW (or CE2s goes HIGH) coincident with or after WE goes LOW, the
output will remain at high impedance.
3. If CE1s goes HIGH (or CE2s goes LOW) coincident with or before WE goes HIGH, the
output will remain at high impedance.
4. If OE is HIGH during the write cycle, the outputs will remain at high impedance.
5. Because I/O signals may be in the output state at this Time, input signals of reverse
polarity must not be applied.
Note 2
Note 5
Note 3
Note 5
相關PDF資料
PDF描述
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