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參數(shù)資料
| 型號： | MB3793 |
| 廠商： | Fujitsu Limited |
| 英文描述： | POWER-VOLTAGE MONITORING IC WITH WATCHDOG TIMER |
| 中文描述： | 電源電壓監(jiān)測芯片，帶有看門狗定時(shí)器 |
| 文件頁數(shù)： | 4/20頁 |
| 文件大?。?/td> | 192K |
| 代理商： | MB3793 |
4
MB3793
-42/30
I
BLOCK FUNCTIONS
1. Comp. S
Comp. S is a comparator with hysteresis to compare the reference voltage with a voltage (V
S
) that is the result of dividing the power voltage
(V
CC
) by resistors 1 and 2. When V
S
falls below 1.24 V, a reset signal is output. This function enables the MB3793 to detect an abnormality
within 1
μ
s when the power is cut or falls abruptly.
2. Comp. O
Comp. O is a comparator to control the reset signal (RESET) output and compares the threshold voltage with the voltage at the CTP pin for
setting the power-on reset hold time. When the voltage at the CTP pin exceeds the threshold voltage, resetting is canceled.
3. Reset output buffer
Since the reset (RESET) output buffer has CMOS organization, no pull-up resistor is needed.
4. Pulse generator
The pulse generator generates pulses when the voltage at the CK1 and CK2 clock pins changes to High from Low level (positive-edge trigger)
and exceeds the threshold voltage; it sends the clock signal to the watchdog timer.
5. Watchdog timer
The watchdog timer can monitor two clock pulses. Short-circuit the CK1 and CK2 clock pins to monitor a single clock pulse.
6. Inhibition pin
The inhibition (INH) pin forces the watchdog timer on/off. When this pin is High level, the watchdog timer is stopped.
7. Flip-flop circuit
The flip-flop circuit RSFF1 controls charging and discharging of the power-on reset hold time setting capacity (C
TP
). The flip-flop circuit RSFF2
switches the charging accelerator for charging C
TP
during resetting on/off. This circuit only functions during resetting and does not function at
power-on reset.
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