參數(shù)資料
型號(hào)： MB15F78ULPFT
廠商： FUJITSU LTD
元件分類(lèi)： XO, clock
英文描述： Dual Serial Input PLL Frequency Synthesizer
中文描述： PLL FREQUENCY SYNTHESIZER, 2600 MHz, PDSO20
封裝： PLASTIC, TSSOP-20
文件頁(yè)數(shù)： 8/27頁(yè)
文件大?。?/td> 160K
代理商： MB15F78ULPFT
MB15F78UL
8
I
FUNCTIONAL DESCRIPTION
1.
Pulse swallow function
f
VCO
=
[ (P
×
N)
+
A]
×
f
OSC
÷
R
f
VCO
: Output frequency of external voltage controlled oscillator (VCO)
P
: Preset divide ratio of dual modulus prescaler (16 or 32 for TX-PLL, 32 or 64 for RX-PLL)
N
: Preset divide ratio of binary 11-bit programmable counter (3 to 2,047)
A
: Preset divide ratio of binary 7-bit swallow counter (0
≤
A
≤
127, A < N)
f
OSC
: Reference oscillation frequency (OSC
IN
input frequency)
R
: Preset divide ratio of binary 14-bit programmable reference counter (3 to 16,383)
2.
Serial Data Input
The serial data is entered using three pins, Data pin, Clock pin, and LE pin. Programmable dividers of TX/RX-
PLL sections, programmable reference dividers of TX/RX-PLL sections are controlled individually.
The serial data of binary data is entered through Data pin.
On rising edge of Clock, one bit of the serial data is transferred into the shift register. On a rising edge of load
enable signal, the data stored in the shift register is transferred to one of latches depending upon the control bit
data setting.
(1)
Shift Register Configuration
The programmable
reference counter
for the TX-PLL
The programmable
reference counter
for the RX-PL
The programmable
counter and the swallow
counter for the TX-PLL
The programmable
counter and the swallow
counter for the RX-PLL
CN1
0
1
0
1
CN2
0
0
1
1
CS
R1 to R14 : Divide ratio setting bits for the programmable reference counter (3 to 16,383)
T1, 2
: LD/fout output setting bit
CN1, 2
: Control bit
X
: Dummy bits (Set “0” or “1”)
: Charge pump curre
n
t select bit
Note : Data input with MSB first.
Programmable Reference Counter
1
2
3
4
5
6
7
8
9
10 11 12 13
14
15
16
17
18
19 20 21 22 23
CN1 CN2 T1 T2 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 CS X
X
X
X
(LSB)
(MSB)
Data Flow
相關(guān)PDF資料
PDF描述
MB15F78ULPVA Dual Serial Input PLL Frequency Synthesizer
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MB15F83ULPFT Fractional-N PLL Frequency Synthesizer
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MB15F88UL Fractional-N PLL Frequency Synthesizer
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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