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3
MB15F04
I
PIN DESCRIPTIONS
Pin No.
Pin name
I/O
Descriptions
1
GND
RX1
–
Ground for RX–PLL section.
2
OSCin
I
The programmable reference divider input. TCXO should be connected with a
AC coupling capacitor.
3
GND
TX
–
Ground for the TX-PLL section.
4
fin
TX
I
Prescaler input pin for the TX-PLL.
The connection with VCO should be AC coupling.
5
Vcc
TX
–
Power supply voltage input pin for the TX-PLL section.
When power is OFF, latched data of TX-PLL is cancelled.
6
Xfin
TX
I
Prescaler complimentary input for the TX-PLL section.
This pin should be grounded via a capacitor.
7
BSC
TX
I
Analog switch output (BS
Always pull-down the BSC
BSC
TX
= “H”; outputs the Do
BSC
TX
= “L” ; goes to high impedance.
TX
) control for the TX section.
state.
TX
. (Do not leave open.)
8
PS
TX
I
Power saving mode control for the TX-PLL section. This pin must be set
at “L” Power-ON. (Open is prohibited.)
PS
TX
= “H” ; Normal mode
PS
TX
= “L” ; Power saving mode
9
Do
TX
O
Charge pump output for the TX-PLL section.
Phase characteristics of the phase detector can be reversed by FC-bit.
10
BS
TX
O
Analog switch output for the TX selection.
11
GND
RX2
–
Ground 2 for the RX section.
12
Do
RX
O
Charge pump output for the RX-PLL section.
Phase characteristics of the phase detector can be reversed by FC-bit.
13
PS
RX
I
Power saving mode control for the RX-PLL section. This pin must be set
at “L” Power-ON. (Open is prohibited.)
PS
RX
= “H” ; Normal mode
PS
RX
= “L” ; Power saving mode
14
LD/fout
O
Lock detect signal output (LD) / phase comparator monitoring output (fout)
The output signal is selected by a LDS bit in a serial data.
LDS bit = “H” ; outputs fout signal
LDS bit = “L” ; outputs LD signal
15
Xfin
RX
I
Prescaler complimentary input for the RX-PLL section.
This pin should be grounded via a capacitor.
16
Vcc
RX
–
Power supply voltage input pin for the RX-PLL section.
When power is OFF, latched data of RX-PLL is cancelled.
17
fin
RX
I
Prescaler input pin for the RX-PLL.
The connection with VCO should be AC coupling.
18
LE
I
Load enable signal input (with the schmitt trigger circuit.)
When LE is “H”, data in the shift register is transferred to the corresponding
latch according to the control bit in a serial data.
19
Data
I
Serial data input (with the schmitt trigger circuit.)
A data is transferred to the corresponding latch (TX-ref counter, TX-Prog.
counter, RX-ref. counter, RX-prog. counter) according to the control bit in a
serial data.
20
Clock
I
Clock input for the 23-bit shift register (with the schmitt trigger circuit.)
One bit data is shifted into the shift register on a rising edge of the clock.