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參數(shù)資料
| 型號(hào)： | MB15F02 |
| 廠商： | Fujitsu Limited |
| 英文描述： | Dual Serial Input PLL Frequency Synthesizer |
| 中文描述： | 雙串行輸入鎖相環(huán)頻率合成器 |
| 文件頁數(shù)： | 7/25頁 |
| 文件大?。?/td> | 228K |
| 代理商： | MB15F02 |
7
MB15F02SL
(Continued)
(V
CC
= 2.4 to 3.6 V, Ta = –40 to +85
°
C)
*1:
*2:
*3:
*4:
*5:
*6:
*7:
*8:
Conditions; fosc = 12 MHz, Ta = +25
°
C, in locking state.
V
CCIF
= V
CCRF
= 3.0 V, fosc = 12.8 MHz, Ta = +25
°
C, in power saving mode.
AC coupling. 1000pF capacitor is connected under the condition of min. operating frequency.
The symbol “–” (minus) means direction of current flow.
V
CC
= 3.0 V, Ta = +25
°
C (|I
3
| – |I
4
|)/[(|I
3
| + |I
4
|)/2]
×
100(%)
V
CC
= 3.0 V, Ta = +25
°
C [(|I
2
| – |I
1
|)/2]/[(|I
1
| + |I
2
|)/2]
×
100(%) (Applied to each I
DOL
, I
DOH
)
V
CC
= 3.0 V, [|I
DO(+85
°
C)
– I
DO(–40
°
C)
|/2]/[|I
DO(+85
°
C)
+ I
DO(–40
°
C)
|/2]
×
100(%) (Applied to each I
DOL
, I
DOH
)
Prescaler divided ratio
Charge pump current fin
IF
Vfin
IF
(min)
16/17
1.5 mA mode
6.0 mA mode
50 MHz
50 MHz
300 MHz < fin
50 MHz
300 MHz < fin
50 MHz
300 MHz < fin
fin
fin
500 MHz
300 MHz
500 MHz
300 MHz*
500 MHz
300 MHz*
500 MHz
–15 dBm
–15 dBm
–10 dBm
–15 dBm
–15 dBm
–15 dBm
–10 dBm
8/9
1.5 mA mode
fin
6.0 mA mode
fin
* : V
CC
= 2.7 V to 3.6 V at 500 MHz,
V
CC
= 2.4 V to 3.6 V, Ta = –40
°
C to +85
°
C at fin < 500 MHz
Parameter
Symbol
Condition
Value
Typ.
–6.0
Unit
Min.
–
Max.
–
“H” level output current
Do
IF
Do
RF
I
DOH
*4
V
CC
= 3.0 V,
V
DOH
= V
CC
/2,
Ta = +25
°
C
V
CC
= 3.0 V,
V
DOL
= V
CC
/2,
Ta = +25
°
C
V
DO
= V
CC
/2
0.5 V
≤
V
DO
≤
V
CC
– 0.5 V
–40
°
C
≤
Ta
≤ +
85
°
C,
V
DO
=
V
CC
/2
CS bit = “H”
mA
CS bit = “L”
–
–1.5
–
“L” level output current
I
DOL
CS bit = “H”
–
6.0
–
CS bit = “L”
–
1.5
–
Charge pump
current rate
I
DOL
/I
DOH
vs V
DO
I
DOMT
*5
I
DOVD
*6
–
–
3
–
–
%
%
10
vs Ta
I
DOTA
*7
–
10
–
%
I
1
I
1
I
3
I
2
I
2
I
4
I
DOL
I
DOH
0.5
Vcc/2
Vcc
Vcc
0.5
Charge Pump Output Voltage (V)
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