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M
Low-Power LCD Microcontroller
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31
In-Circuit Debug
Embedded debugging capability is available through
the JTAG-compatible Test Access Port. Embedded
debug hardware and embedded ROM firmware pro-
vide in-circuit debugging capability to the user applica-
tion, eliminating the need for an expensive in-circuit
emulator. Figure 4 shows a block diagram of the in-cir-
cuit debugger. The in-circuit debug features include:
a hardware debug engine,
a set of registers able to set breakpoints on register,
code, or data accesses, and
a set of debug service routines stored in the utility
ROM.
The embedded hardware debug engine is an indepen-
dent hardware block in the microcontroller. The debug
engine can monitor internal activities and interact with
selected internal registers while the CPU is executing
user code. Collectively, the hardware and software fea-
tures allow two basic modes of in-circuit debugging:
Background mode allows the host to configure and set
up the in-circuit debugger while the CPU continues to
execute the application software at full speed. Debug
mode can be invoked from background mode.
Debug mode allows the debug engine to take control
of the CPU, providing read/write access to internal reg-
isters and memory, and single-step trace operation.
LCD Controller
The MAXQ2000 microcontroller incorporates an LCD
controller that interfaces to common low-voltage dis-
plays. By incorporating the LCD controller into the
microcontroller, the design requires only an LCD glass
rather than a considerably more expensive LCD mod-
ule. Every character in an LCD glass is composed of
one or more segments, each of which is activated by
selecting the appropriate segment and common signal.
The microcontroller can multiplex combinations of up to
33 segment (SEG0–SEG32) outputs and four common
signal outputs (COM0–COM3). Unused segment out-
puts can be used as general-purpose port pins.
The segments are easily addressed by writing to dedi-
cated display memory. Once the LCD controller set-
tings and display memory have been initialized, the
17-byte display memory is periodically scanned, and
the segment and common signals are generated auto-
matically at the selected display frequency. No addi-
tional processor overhead is required while the LCD
controller is running. Unused display memory can be
used for general-purpose storage.
The design is further simplified and cost-reduced by
the inclusion of software-adjustable internal voltage
dividers to control display contrast, using either V
DDIO
or an external voltage. If desired, contrast can also be
controlled with an external resistance. The features of
the LCD controller include the following:
Automatic LCD segment and common-drive signal
generation
Four display modes supported:
Static (COM0)
1/2 duty multiplexed with 1/2 bias voltages (COM0,
COM1)
1/3 duty multiplexed with 1/3 bias voltages (COM0,
COM1, COM2)
1/4 duty multiplexed with 1/3 bias voltages (COM0,
COM1, COM2, COM3)
Up to 36 segment outputs and four common-signal
outputs
17 bytes (136 bits) of display memory
Flexible LCD clock source, selectable from 32kHz or
HFClk / 128
Adjustable frame frequency
Internal voltage-divider resistors eliminate require-
ment for external components
Internal adjustable resistor allows contrast adjustment
without external components
TAP
CONTROLLER
CPU
DEBUG
ENGINE
DEBUG
SERVICE
ROUTINES
(UTILITY ROM)
TMS
TCK
TDI
TDO
CONTROL
BREAKPOINT
ADDRESS
DATA
MAXQ2000
Figure 4. In-Circuit Debugger